Activity
From 09/17/2012 to 10/16/2012
10/16/2012
- CO 08:43 AM FPGA Development: RE: Top level module question
- That was a fast reply! Thanks Mike.
I'm using the latest MDK alright and I do see that there is generics and code for GEN_DCM_RST and GEN_DNA_PORT. I thought there had been a change of mind about using a DCM generally and you'd decide... - MW 07:37 AM FPGA Development: RE: Top level module question
- Hi Conor,
First, the most recent MDK should include code in the base module to support the DCM reset logic as well as read out the digital DNA of the Spartan 6 device. Are you using an older version?
Many folks (including Critical... - Hi all,
I'm a bit of newbie with FPGAs but I've written my own top level GPIO test design and it at least synthesises. There are a few warnings though which leads me to a small question on the top level modules. So this is a real newb...
10/11/2012
- Hi all,
I was doing some cross referencing for my own documentation and noticed a few errors in the ucf files. This is in the last MDK so they might have been fixed. I'll also add in my own documentation in case anyone finds it useful...
10/10/2012
- WC 02:26 PM PCB Development: RE: MityDSP-L138F Failure to Boot
- Mike,
I isolated the I2C0 bus from the baseboard and I am still having the issue. How should I contact you to forward the schematic?
Thanks,
Wade
- WC 11:35 AM PCB Development: RE: MityDSP-L138F Failure to Boot
- Mike,
The SPI1 lines are not attached on the baseboard so that shouldn't be the issue and the reset line is being de-asserted. Hence, that leaves the I2C0 bus, which has a number of devices attached on the baseboard. I will try isolat... - MW 11:23 AM PCB Development: RE: MityDSP-L138F Failure to Boot
- Hi Wade,
Would you be willing to send me a schematic (offline, of course) of your baseboard to review?
Your baseboard could be the culprit as you suspect. You should be able to get at least to a u-Boot prompt without much worry as... - I'm trying to get a MityDSP-L138F SOM to boot on a custom baseboard. The SOM powers on; i.e. the Power Good LED lights up, but the boot process goes no further. No data comes out the console UART and the FPGA done LED never lights. I've ...
- CR 01:51 PM Software Development: RE: Project build in CCSv5.1 not successful when using the Platform.tci for creating a DSP/BIOS 5.x Configuration File
- OK, i found the file i need and now it's working.
thanks
Christian - CR 12:41 PM Software Development: RE: Project build in CCSv5.1 not successful when using the Platform.tci for creating a DSP/BIOS 5.x Configuration File
- I forgot to delete the original created *.tcf-file. Now it is almost working - Only one new error appeared:
#5 could not open source file "clkcfg.h" clk.c /hellobios5 line 19 C/C++ Problem
The curious thing for me is, why can the f... - GG 11:36 AM Software Development: RE: Project build in CCSv5.1 not successful when using the Platform.tci for creating a DSP/BIOS 5.x Configuration File
- Hi Christian,
Mike is right, we need more details, but here is my guess at what could perhaps solve your problem (seeing as I've had similar issues in the past):
What is the path you are specifying for "TConf Script Compiler->Gene... - CR 11:35 AM Software Development: RE: Project build in CCSv5.1 not successful when using the Platform.tci for creating a DSP/BIOS 5.x Configuration File
- there are really a lot of errors - more than 100 but i will post here all i got:
Description Resource Path Location Type
./hellobios5cfg.cmd CACHE_L1D memory range has already been hellobios5 line 260 C/C++ Problem
./hellobios5cfg.... - MW 11:28 AM Software Development: RE: Project build in CCSv5.1 not successful when using the Platform.tci for creating a DSP/BIOS 5.x Configuration File
- Can you post the errors?
- Hi,
to getting started with the C674x-Core, CCSv5.1 and DSP/BIOS, I generated a new DSP/BIOS-Project in the CCS. I chose a sample application which is already provided by TI and was selectable in the set up screen for a new project.
... - I am a linux newbie and have gotten as far as "Hello World" and "Hello DSP".
Is there any documentation for the functions that can be called from an application, like a programmer's reference? For this particular distribution? and f...
10/09/2012
- CO 10:15 AM Software Development: RE: mitydsp L138 starter file
- IE9 has a download manager which might be better than previous attempts (which are terrible 1995-2011). In previous versions of Internet Explorer, a failed download will yield no warnings or errors whatsoever. Which is why I personally u...
10/08/2012
- GG 05:07 PM Software Development: RE: Problem with uPP in DLB
- Hi François,
Sorry about the delay in my reply. And sorry, no, we do not have an generic FPGA loads that have uPP setups to test with at the moment.
\Greg - JP 02:27 PM Software Development: RE: Debugging ARM in Eclipse
- I have added text to the http://support.criticallink.com/redmine/projects/arm9-platforms/wiki/Debugging_ARM_Apps_with_Eclipse wiki page to reflect what the screens look like when using Code Composer 5.0. The original text was for an olde...
- From the wiki page on "Debugging ARM apps with Eclipse":
> On eclipse, you will need to setup a new debug configuration. In the debug configuration dialog you'll need to perform the following steps:
> ...
This is not matching up with... - We are trying to reprogram a Dead L138F board. However, we are observing a problem
after executing "sfh_OMAP-L138.exe -flash -v -p COMx UBL_SPI_MEM.ais u-boot.bin"
as given.
After "Boot completed successfully", we get "Waiting for ...
10/05/2012
- MF 11:20 AM Software Development: RE: DSP Hello World won't link
- Almost ...
In Eclipse in Properties->C/C++ Build->Settings->Cross Settings I changed Path to "/usr/local/oecore-i686/sysroots/i686-angstromsdk-linux/usr/bin/armv5te-angstrom-linux-gnueabi" as you suggested. Still did not compile.
... - GG 10:56 AM Software Development: RE: DSP Hello World won't link
- Hi Mary,
In Eclipse in the Properties->C/C++ Build->Settings->Cross Settings try setting Path to "/usr/local/oecore-i686/sysroots/i686-angstromsdk-linux/usr/bin/armv5te-angstrom-linux-gnueabi" (And make sure that Prefix is set to "ar... - DG 10:54 AM Software Development: RE: DSP Hello World won't link
- Hi Mary,
Your PATH would need /usr/local/oecore-i686/sysroots/i686-angstromsdk-linux/usr/bin/armv5te-angstrom-linux-gnueabi/ prior to running Eclipse for it to locate the compiler. I think you can also edit the C++ environment within ... - MF 10:44 AM Software Development: RE: DSP Hello World won't link
- Sorry, there was no such entry in ~/.bashrc nor in /etc/bash.bashrc
I think there is something amiss in my Eclipse settings. I noticed that the newer toolchain releases extract to a different directory structure than the older ones. ...
10/04/2012
- GG 03:28 PM Software Development: RE: DSP Hello World won't link
- Hi Mary,
My guess is that somewhere (most likely your bashrc script) the environment for the old toolchain is being setup and that is why even after running the setup script for the new toolchain you still see gcc as version 4.4.3.
... - MF 11:29 AM Software Development: RE: DSP Hello World won't link
- I had originally downloaded Aug-2012 SDK (angstrom-eglibc-i686-armv5te-toolchain-qte-v2012.05.tar.bz2)and installed this using the following command:
sudo tar xjvf angstrom-eglibc-i686-armv5te-toolchain-qte-v2012.05.tar.bz2 -C /
th...
10/03/2012
- GG 02:46 PM Software Development: RE: DSP Hello World won't link
- Hi Mary,
In regards to your first issue, the fix you made is correct. The arm_main.cpp file is simply out of date and needs to be updated. I will look into that.
As far as your linking issue, it looks like you are using the toolc... - I am following the instruction for the DSP Hello Word project wiki page.
First Problem:
I got a compile error for this line:
lpMessageOutbound->SendMessage(lpMessageBuffer, strlen(lpMessageBuffer)+1);
saying that there was no... - KV 01:04 PM Software Development: RE: mitydsp L138 starter file
- Dominic,
Download of the starter file is succussful.Unzip is failing. attached is the screenshot of the message. Winzip works withw the gel file you sent me.
10/02/2012
- DG 10:41 PM Software Development: RE: mitydsp L138 starter file
- Sorry you seem to be having issues downloading the file. I tried here and was able to download the file and extract it successfully - probably an error occurred during your download. The copy you attached to your post was only 235.1 KB, ...
- Downloaded http://support.criticallink.com/redmine/attachments/1659/CL_MityDSPL138_StarterWare_06_20_12.zip
unable to unzip the file. Winzip complains that it is not a valid archive file.
I am looking for a valid gel or ccxml file fo... - MW 12:57 PM PCB Development: RE: SPI1_SCS0 -> Edgeconnector pin 53?
- Yes,
However, this pin should normally be treated as RESERVED as it is the chip select line for the on-board SPI NOR FLASH. The NOR FLASH is used as the primary first and second stage boot loader media by the OMAP-L138.
This pin w... - Hi,
is the pin 53 on the edgeconnector (L138-Module) connected with the E19-pin (SPI1_SCS[0]) on the OMAP processor?
thanks,
Christian
09/27/2012
- AB 04:04 PM PCB Development: RE: MMCSD
- Conor,
We have addressed the MMC issues in the datasheet which can be found here by selecting the latest board version: http://support.criticallink.com/redmine/projects/indio/wiki/Industrial_IO_Revision_Information
During the revie... - CO 06:20 AM PCB Development: RE: MMCSD
- Thanks Mike. Once I saw it, I realised the reason why - that stubs on the connector line would warrant concern. Plus when you sent me the link to the versioning page on another posting, I noted the red Xs over the MMCSD0 pins but I faile...
- MW 05:36 AM PCB Development: RE: MMCSD
- Hi Conor,
You're right. I am trying to figure out what happened here and I see a note in a review that there was concern (not confirmed, mind you) about leaving stubs on the MMC signal path by running the nets to both the SD Card con... - CO 04:24 AM PCB Development: RE: MMCSD
- None of the documented MMCSD0 connections on the J700 are wired up. Be nice if that was documented.
- EB 09:47 AM PCB Development: RE: Intermittent boot failure w/ U-boot
- I found the problem.
It was not seating well in the SODIMM socket.
That's a long story, but was my fault.
I am curious though, about which pins would cause that.
Thanks,
Emmett - EB 09:14 AM PCB Development: RE: Intermittent boot failure w/ U-boot
- Here's the SOM sheet, which I believe has everything pertinent to this issue.
U1 is providing a 67ms delay which I'm sure is overkill, but should work OK.
I get the same result w/ power-up or with the reset switch SW1 @ U1.
Also - w...
09/26/2012
- MW 06:18 PM PCB Development: RE: Intermittent boot failure w/ U-boot
- What do you have for a reset circuit? How is the reset input driven?
U-Boot shouldn't hang if there is no RS-232 activity (doesn't look at flow control or anything). I don't think it uses any kind of BAUD detect either.
-Mike - I have the 1808F on our carrier board now.
It is working and communicating RS232.
About 3/4 of power-on events, it locks up.
There is no RS232 comm, and the FPGA never finishes configuration.
The same SOM on the Industrial I/O boar... - CO 12:05 PM PCB Development: RE: MMCSD
- Hi Critical Link engineers:
If I probe (carefully) pin 5 of an SD card in place, I see the SDIO Clock. My scope says it's 37.5MHz and 3.5V roughly.
According to the datasheet if I then hook up a probe to J700, pin 23 on the Industr...
09/25/2012
- CO 11:49 AM PCB Development: RE: MMCSD
- Further to this - I have my WL1271 module hooked up to the MityDSP board. However the driver just powers up and down and up and... It successfully toggles GPIO0/5 each time (it's not 7 as documented in MityDSP baseboard docs). I took the...
09/18/2012
- MW 05:42 PM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- See Table 1 in the "datasheet":http://www.mitydsp.com/images/upload/File/MityDSP-L138F%20Spec.pdf. The pins are tagged with an asterix and a note at the bottom of the table. But yes, those are the 8 pins.
-Mike
- MM 12:10 PM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- Hi Mike,
I didn't realize that the DVI wouldn't work with the LX-45, luckly we don't need the DVI interface. For reference are the 8 pins missing for DVI the only pin difference between LX16 and LX45?
Thanks,
Matt - CO 10:18 AM Software Development: RE: Simple GPIO toggle
- It works! Thanks for all your help on this Mike. I really appreciate that.
Big Note: It still does not work on Gpio0/7. Because gpio0/7 is not actually routed to the J700 connector!!!
Look at the links for the latest rev of the boa... - CO 08:56 AM Software Development: RE: Simple GPIO toggle
- My board is rev: 80-000268RI-2B, the latest revision.
Ah yes. I see. I really should have spotted it myself as I went and checked GP0[7] in the L138 docs and saw that it was multiplexed with PWM and mcASP functionality. But as GP0[6] ... - MW 07:21 AM Software Development: RE: Simple GPIO toggle
- Hi Conor,
Think I found it. If you check the schematics from this "page":http://support.criticallink.com/redmine/projects/indio/wiki/Industrial_IO_Revision_Information, it looks like GP0_7 is pin-muxed for the AXR15 (done in the base... - CO 05:56 AM Software Development: RE: Simple GPIO toggle
- I took the MDK from 2012-03-12 and compiled uBoot and uImage from defaults (using industrialio-defconfig for the kernel). I then flashed those to the board and it booted up just fine. But GPIO0/7 will still not toggle. It will change gpi...
- CO 03:51 AM Software Development: RE: Simple GPIO toggle
- I cannot find any particular reason for the pins to do this in the code. I'll recompile the kernel and uboot on the off chance something is happening there... I never updated uboot and I believe some gpio pin parameters are set there too.
09/17/2012
- MW 07:29 PM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- Matt,
Are you sure you have an LX-45 based FPGA? The LX-45 does not bond out 8 pins that the LX-16 does. These include pins F12, E12, D12, C12, F11, E11, E7, and E8 (this should be documented in the specification). All of this sign... - MW 07:09 PM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- Hi Matt,
Are you using a wide screen monitor? We've seen some widescreen monitors won't lock up with VGA resolution due to the aspect ratio. You might try using the wvga_800x480 setting instead (that is the resolution that the visio... - MM 06:32 PM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- Hi Mike,
Yes, I am using the DVI connector. The FPGA image I am using is one I generated for the x45 FPGA from the source code in examples/industrial_io/fpga. I though this code was for the vision framework kit and would have support ... - MW 05:58 PM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- Hi Matt,
If you are trying to use the DVI connector, you need to use the FPGA image that was built to run with the DVI interface and not the LCD interface. The builds are different as the clock rates and pin-outs/routing are not the ... - MM 05:42 PM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- Ok good news! I got the FPGA bin files needed so that the FPGA ready light comes on. The not so great news is I can't get anything to show up on the monitor connected to the industrial_io board.
I'm following the instructions from:
... - MM 10:11 AM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- Hi Mike,
Last week I didn't really have time to work on it, this week I'll know if I need more assistance.
-Matt - CO 08:46 AM Software Development: RE: Simple GPIO toggle
- That's supposed to be GPIO0/6 by the way...
- CO 08:44 AM Software Development: RE: Simple GPIO toggle
- Certainly... The PCB number is "120540". I've no boards plugged in at all - just the L138 module and the baseboard. There's only a single wire pushed into the connector which is connected to a voltmeter.
I'll try another one.....
O... - MW 08:39 AM Software Development: RE: Simple GPIO toggle
- Hmmm...
Do you have an expansion board plugged in right now? Can you disconnect it if you do?
It's possible that the outputs might not match the inputs if there is an external driver or short that is stronger than the driver in th... - CO 08:29 AM Software Development: RE: Simple GPIO toggle
- GPIO0/15 is the opposite which is rather odd. It starts out as 0, whereas GPIO0/7 starts out as 1:
root@mityomapl138:/sys/class/gpio# cat gpio15/value
0
root@mityomapl138:/sys/class/gpio# echo "out" > gpio15/direction
root@mityomap... - CO 08:21 AM Software Development: RE: Simple GPIO toggle
- Thanks Mike,
When I cat from /sys/class/gpio7/value, it reads "1" all the time, no matter what I've previously written. I did think that I was reading from the wrong pin so I had checked that...
The board is a L138F in an Industria... - MW 07:23 AM Software Development: RE: Simple GPIO toggle
- Hi Conor,
I don't see anything wrong with your approach. You might check the value that the pin is reading back (e.g., cat /sys/class/gpio7/value). If the pin is stuck, it should right a "1" in all cases. If it is toggling, then per... - I see this has been asked before in various ways so sorry to ask again (I'm not getting it!).
I have pin 19 from J700 hooked up to a meter. The MityDSP docs say this is GPIO, bank 0 offset 7.
So I should be able to toggle the pin b...