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From 06/10/2016 to 07/09/2016

07/09/2016

10:22 PM MitySOM-5CSX Altera Cyclone V FPGA Development: 5CSX-H6-53B-RC with PCIe Hard IP (Root)
Hi,
We are considering one of the MitySOM boards for use in one of the projects we are working on. I'm currently g...
Thomas Carpenter
06:24 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: SPI1 controller, access to FLASH and carrier board. NOT linux based.
Ian St. John wrote:
> Can you confirm that the signal marked as 'reserved' just beside the SPI1_CSC1 is the SPI1_CSC...
Jonathan Cormier
05:56 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: SPI1 controller, access to FLASH and carrier board. NOT linux based.
Hmm. I asked the EE about the diagram and he was interested in the fact that there was a pull up on the CS line. Appa... Ian St. John
12:40 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: SPI1 controller, access to FLASH and carrier board. NOT linux based.
The eeprom is on the i2c0 bus. I'm assuming you are talking about the SPI Nor flash which is on SPI1_CS0.+
Oops...
Ian St. John
01:23 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: L138 dsplink problem - schedule while atomic bug
Hi Fred,
Syslink is newer than DSPlink, though in the context of the L138 it's very similar code (syslink evolved ...
Michael Williamson
12:11 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: L138 dsplink problem - schedule while atomic bug
The error collected above was on the bench after making some minor software changes seemingly unrelated with the code... Fred Weiser
11:23 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: L138 dsplink problem - schedule while atomic bug
I found the following on the TI site; looks like they struggled with this issue with sys-link... I'm not sure how sys... Fred Weiser

07/08/2016

11:55 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: L138 dsplink problem - schedule while atomic bug
I think there may be a bug in the dsplink kernel code that causes the scheduler to run after a call to spinlock. "rem... Fred Weiser
09:33 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: SPI1 controller, access to FLASH and carrier board. NOT linux based.
Ian St. John wrote:
> I am building and programming a custom board without Linux. Basic embedded drivers running fro...
Jonathan Cormier

07/07/2016

11:26 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: /sys/class/fpga-bridge directory is empty
Thank you for letting us know about this, it was a bug that was caused by some updates to the ethernet driver, which ... Daniel Vincelette

07/05/2016

10:18 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: SPI1 controller, access to FLASH and carrier board. NOT linux based.
I am building and programming a custom board without Linux. Basic embedded drivers running from SPI1,CS0 (8MB NOR Fla... Ian St. John

06/30/2016

11:08 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Why do I get a "CALIBRATION FAILED" error during boot?
Malcolm,
Thanks for catching the typo, it's been updated.
With the CSEL "properly" set and the module still not...
Alexander Block
03:49 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Why do I get a "CALIBRATION FAILED" error during boot?
Alex,
Thank you for the reply.
I've checked the "gotchas" wiki page and the CSEL setting was the only thing not...
Malcolm Hartnell
09:31 AM MitySOM-5CSX Altera Cyclone V Software Development: /sys/class/fpga-bridge directory is empty
I downloaded the latest kernel sources from the critical link repo, rebuilt the kernel and .dtb files, and loaded the... Mike Cherny

06/29/2016

10:01 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Why do I get a "CALIBRATION FAILED" error during boot?
Malcolm,
Dan and Adam brought this issue to my attention and I will followup concerning the RMA replacement via e-...
Alexander Block
05:55 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Why do I get a "CALIBRATION FAILED" error during boot?
I've tried both suggestions but the result is the same, I get the "CALIBRATION FAILED" message on my first board and ... Malcolm Hartnell

06/28/2016

11:56 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Why do I get a "CALIBRATION FAILED" error during boot?
Dan,
I've downloaded the file you provided the link for but first ...
Adam,
I presently have CSEL[0-1] set t...
Malcolm Hartnell
11:39 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Why do I get a "CALIBRATION FAILED" error during boot?
There is a CV errata that can cause such a failure. Please check that the CSEL[0-1] pins are set to "00" to avoid a ... Adam Dziedzic
11:13 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Why do I get a "CALIBRATION FAILED" error during boot?
Hello Malcolm,
I know you said that your current SD card works for one of your SOMs but would you mind trying our ...
Daniel Vincelette
11:00 AM MitySOM-5CSX Altera Cyclone V Software Development: Why do I get a "CALIBRATION FAILED" error during boot?
I have been using the same module for the last two weeks and today it has started giving the "CALIBRATION FAILED" err... Malcolm Hartnell

06/24/2016

01:10 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Building BSP for 5cse
Hi Sam,
I've been able to recreate what you're seeing. It looks like the devicetree generated through yocto is nam...
Daniel Vincelette
06:41 AM MitySOM-5CSX Altera Cyclone V PCB Development: RE: Development Kit 2.5V VIO, change to 3.0 or 3.3
Thank you Alex, that's exactly what I wanted to know. I understand your point about the warranty, and proceeding car... Stephen Snyder

06/23/2016

04:47 PM MitySOM-5CSX Altera Cyclone V PCB Development: RE: Development Kit 2.5V VIO, change to 3.0 or 3.3
Stephen,
Thanks for reaching out to us about this question.
Please note that making any modification to the car...
Alexander Block
09:56 AM MitySOM-5CSX Altera Cyclone V PCB Development: Development Kit 2.5V VIO, change to 3.0 or 3.3
It looks like banks 3B, 4A, and 8A have their I/O voltage tied to a 2.5V supply on the development kit.
If I want ...
Stephen Snyder
12:32 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Building BSP for 5cse
Hi Sam,
I'm currently re-running the yocto build here to see if I can recreate the issue you are seeing. I will up...
Daniel Vincelette
11:36 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Building BSP for 5cse
Hi Alex,
I selected the 5cse for the build, not the 5csx. I have done this full build no fewer than 3 times with ...
Sam Anderson
11:17 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Building BSP for 5cse
Sam,
I believe that the issue you ran into if following the Yocto wiki steps is that you may have selected the "mi...
Alexander Block

06/22/2016

07:49 PM MitySOM-5CSX Altera Cyclone V Software Development: Building BSP for 5cse
I am trying to follow your documentation for using Yocto to build an image for the 5CSE on the dev board carrier, and... Sam Anderson
04:13 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: kernel 3.2 - tcpip stack latency
Hi Greg,
Than you for your feedback.
Indeed, flag CONFIG_PREEMPT is set in kernel config. As far as we can see...
Patrice Bastiaens

06/21/2016

01:30 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: kernel 3.2 - tcpip stack latency
Hi Patrice,
Since you are using SCHED_RR I am assuming you are using CONFIG_PREEMPT in your kernel config, correc...
Gregory Gluszek
06:26 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: kernel 3.2 - tcpip stack latency
Hello,
We've built an application receiving messages from two devices at a rate of 1 message of 1440 bytes every 1...
Patrice Bastiaens
03:45 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: How to add aditional HPS GPIO's
Hi Alex,
Still a few misnumbered things in the above post.
Anyway, removing the switches from the DTS means tha...
Matthew Schubert

06/20/2016

01:15 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HDMI Output and Quartus Versions
Steve,
We have successfully rebuilt the "HDMI example":https://support.criticallink.com/redmine/projects/5csxbase/...
Alexander Block
11:07 AM MitySOM-5CSX Altera Cyclone V FPGA Development: HDMI Output and Quartus Versions
Hi,
I noticed that the HDMI Output example you've posted was done in Quartus 15.1 but the VM with the toolchain in...
Stephen Snyder
01:10 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: How to add aditional HPS GPIO's
Maetthew,
Good catch. Apparently when I did the mapping I started off by one. We have updated the post above to ha...
Alexander Block
02:09 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: How to add aditional HPS GPIO's
I have noticed that in the DTS the switches are now on the GPIOs that I want to use:
http://support.criticallink.com...
Matthew Schubert

06/19/2016

11:26 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: How to add aditional HPS GPIO's
I'm having some issues setting GPIO37, 40 and 41 from within Linux.
Firstly, in the instructions above, you mentio...
Matthew Schubert

06/17/2016

08:25 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Flashing a new kernel to NOR from Linux rather than u-boot
Here are the results from my board/MDK:... Fred Weiser

06/16/2016

05:43 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Flashing a new kernel to NOR from Linux rather than u-boot
Alternatively it may be possible for you to build the kernel features as modules and insert them in the live system. ... Jonathan Cormier
05:39 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Flashing a new kernel to NOR from Linux rather than u-boot
Fred,
Do you have /dev/mtdblock* devices? My kernel boot args have this "root=/dev/mtdblock0", so my assumption i...
Jonathan Cormier
05:26 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: Flashing a new kernel to NOR from Linux rather than u-boot
We use opkg to push updates to our products that are installed in the field. We now need a way to update the kernel, ... Fred Weiser

06/15/2016

05:14 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: How to configure the GPIOs as outputs?
Do note that the custom baseboard instructions were written for the 335x family. So some things will be slightly diff... Jonathan Cormier
04:14 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: How to configure the GPIOs as outputs?
Héctor,
Please check the last section of this page for information on how to review and set the pinmux for the dev...
Bob Duke
03:11 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: How to configure the GPIOs as outputs?
Hi, it's me again,
I'm knowing the Profibus Development Kit (and embedded systems) and for that I'm trying to do s...
Hector Bojorquez
11:00 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Problems with the first time configuration
Now it's working, thanks a lot Jonathan! Hector Bojorquez
10:02 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Problems with the first time configuration
Hector Bojorquez wrote:
> > This is a error is normal and doesn't hurt anything.
> *
> So, the reflashing process ...
Jonathan Cormier
09:55 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Problems with the first time configuration
> This is a error is normal and doesn't hurt anything.
*
So, the reflashing process went well?*
> If you don't h...
Hector Bojorquez
08:38 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Problems with the first time configuration
Hector Bojorquez wrote:
> >There shouldn't be a space in the console arg. "console=ttyS1,115200n8"
> >Also root sh...
Jonathan Cormier

06/14/2016

05:45 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Problems with the first time configuration
>There shouldn't be a space in the console arg. "console=ttyS1,115200n8"
>Also root should have an '=' not a '-'.
...
Hector Bojorquez
03:35 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Problems with the first time configuration
Hector Bojorquez wrote:
> Hi Jonathan,
>
> I made the changes, and yes the problem continues the same, I checked ...
Jonathan Cormier
02:56 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Problems with the first time configuration
Hi Jonathan,
I made the changes, and yes the problem continues the same, I checked the bootargs and this was the r...
Hector Bojorquez
01:20 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Problems with the first time configuration
Thanks for all the logs, definitely helpful. The kernel panic indicates that it failed to find the filesystem. See be... Jonathan Cormier
12:50 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Problems with the first time configuration
Hi,
I followed the steps in the [[Reprogramming_a_Dead_Board]] guide and I got access to the u-boot prompt again, ...
Hector Bojorquez
05:15 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Specifics on reserving DDR for PRU/ARM shared use
Regarding your specific questions, yes, you could use memmap to set aside a particular chunk of memory. Where you set... Bob Duke
05:07 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Specifics on reserving DDR for PRU/ARM shared use
Hi Andrew,
I recommend you review the TI-provided documentation and examples for the PRU available here:
<https...
Bob Duke

06/13/2016

05:14 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: JFFS2 "scheduling while atomic" problem with L138 running linux kernel 3.2
Sorry I missed that Fred.
You can just make the change (swapping two lines) yourself for testing, or you can appl...
Bob Duke
05:12 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: JFFS2 "scheduling while atomic" problem with L138 running linux kernel 3.2
Note we can list any other jffs patches that is in the linux-3.2.y branch that isn't in ours by doing the following:
...
Jonathan Cormier
05:07 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: JFFS2 "scheduling while atomic" problem with L138 running linux kernel 3.2
The patch was included in the 3.2.18 kernel release. You can cherry-pick the patch from there to verify it fixes you... Jonathan Cormier
04:56 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: JFFS2 "scheduling while atomic" problem with L138 running linux kernel 3.2
Looks like someone already did the backport of the fix. The patch is very straight forward.
https://github.com/Angs...
Jonathan Cormier
04:28 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: JFFS2 "scheduling while atomic" problem with L138 running linux kernel 3.2
Ah, yes, so this is indeed the problem; the code you show above is _before_ the fix. The issue is mutex_lock cannot f... Fred Weiser
02:48 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: JFFS2 "scheduling while atomic" problem with L138 running linux kernel 3.2
Fred,
The current MityDSP-L138 kernel (Branch: mitydsp-linux-v3.2) has the following code in @fs/jffs2/gc.c@:
...
Bob Duke
10:18 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: JFFS2 "scheduling while atomic" problem with L138 running linux kernel 3.2
I have been getting a lot of "scheduling while atomic" messages seemingly centered around JFFS2:
@Jun 12 12:08:37 ...
Fred Weiser

06/10/2016

12:20 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: Specifics on reserving DDR for PRU/ARM shared use
The note in the wiki article for getting started with PRU mentions the following:
??A safe design that wanted to u...
Andrew Bean
11:34 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Problems with the first time configuration
Hector, I'm not sure what commands you ran but the nand commands you show shouldn't have created this. It appears y... Jonathan Cormier
11:04 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Problems with the first time configuration
I followed the Guide without errors advice, and at the final step I got the attached text (MKD_Update_End)
But whe...
Hector Bojorquez
 

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