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From 01/21/2014 to 02/19/2014

02/19/2014

08:15 AM Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
We leave it at 300 Mhz Marc Postema
08:08 AM Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
When you boot linux, are you changing the CPU OPP to 456 MHz or leaving it at 300 MHz? Michael Williamson
08:03 AM Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
Hello,
Yes we have adjusted the bus master priority of uPP, but did not see any great improvements (strangely).
...
Marc Postema
07:42 AM Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
Did you check / adjust your UPP Bus master priorities? Michael Williamson
07:33 AM Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
Hello,
Just a quick update. When we do not boot into linux (just uboot) we do not see
these errors.
So booting...
Marc Postema

02/18/2014

08:50 AM Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
Hi Marc,
Here are a couple of other things to consider:
# In the past we've had throughput problems with TI's ...
Gregory Gluszek
08:22 AM Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
You might raise the priority up a bit (try 0 or 1). If the transfers are small, then it should be OK to give it prio... Michael Williamson
08:04 AM Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
Hello,
Here are some answers to the questions:
* Are you trying to run continuous transfers?
- We do not r...
Marc Postema
07:17 AM Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
Hi Marc,
Are you trying to run continuous transfers?
At 75 Mhz, you should be running a buffer rep rate of 64 /...
Michael Williamson
02:55 AM Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
Hello,
Here are some answers to the questions:
* Are you using the Critical Link MDK drivers? If so, what versi...
Marc Postema
07:22 AM Software Development: RE: I2C Bus
Hi Bruce,
I believe that the I2C addresses for I2C0 are described in the "Carrier Board Design Guide":http://www.c...
Michael Williamson
06:05 AM Software Development: I2C Bus
We are currently investigating a problem accessing the I2C0 bus.
My initial enquiry is to find out what devices ...
Bruce Kenny

02/17/2014

09:25 AM Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
Hi Marc,
If you are following the uPP design guidelines, then perhaps this is a true underflow or overflow condit...
Gregory Gluszek
06:05 AM Software Development: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
Hello,
We use the MityDSP-L138F and between DSP and FPGA we use UPP communication but transmit (channel A) is givi...
Marc Postema

02/10/2014

02:57 PM Software Development: RE: "Using TI C64x+ IMGLIB on OMAPL138F"
Hello Naveen,
As you stated, the vision_framework demo uses the IMG_sobel_3x3_16(), which you can use to understan...
Bob Duke
09:20 AM Software Development: RE: How to reserve EDMA for DSP
I tried modifying device-da8xx.c as describe above, but the boot process hung. Here's the relevant part of the log:
...
Mary Frantz

02/06/2014

03:21 PM Software Development: RE: How to reserve EDMA for DSP
Mary,
I think you can disable the dma usage of the spi driver. I am using the following resource declaration for ...
Jonathan Cormier
11:03 AM Software Development: RE: How to reserve EDMA for DSP
In researching this I found what looks like a similar problem:
http://e2e.ti.com/support/dsp/omap_applications_pro...
Mary Frantz
03:06 PM Software Development: Build Error when using Yocto
I am attempting to run this command to compile the kernel:
bitbake virtual/bootloader
And get the following err...
Julio Liriano

02/05/2014

11:04 AM FPGA Development: I2C SMBus development
Hi All,
I can see here (http://support.criticallink.com/rm_embedded/dsp-products/MDK_DOCS/2.11/core/class_mity_d_s...
Angelos Spanos
11:01 AM Software Development: RE: Latest stable linux build for MityARM-1808/F
Thanks Mike,
That did the works for me.
Cheers,
Angelos
Angelos Spanos
06:49 AM Software Development: RE: USB-OTG as a peripheral and a host
Hello Jonathan and Mike,
Thank you for your quick replies.
@Mike
Thank you for your suggestion. I could use it...
Preejith S P
05:05 AM Software Development: "Regarding MitydspL138F Vision development kit"
Hi,
We have received your Vision Development Kit from Digikey distributor this week. As per your VDK manual we int...
Naveen K.S

02/04/2014

01:50 PM Software Development: RE: Accessing SPI1 bus
Mary,
You can search the kernel source for the messages by using grep. For example I might search for the string ...
Jonathan Cormier
01:18 PM Software Development: RE: Accessing SPI1 bus
I have successfully added the SPIDEV support to the kernel and can communicate over the bus now.
I occasionally se...
Mary Frantz
01:07 PM Software Development: How to reserve EDMA for DSP
I am having an ARM/DSP conflict. The DSP is primarily reading data from the McBSP and transferring the data to a cir... Mary Frantz
12:39 PM Software Development: RE: Latest stable linux build for MityARM-1808/F
In the "file tab":https://support.criticallink.com/redmine/projects/arm9-platforms/files there are MDK downloads (.ru... Michael Williamson
12:35 PM Software Development: Latest stable linux build for MityARM-1808/F
Hi All,
Could you please tell me what is the Latest stable linux build for MityARM-1808/F? Could you also provide ...
Angelos Spanos
08:53 AM Software Development: RE: USB-OTG as a peripheral and a host
Probably the best solution would be to load in the USB OTG file storage gadget. This will make the L138 look like a ... Michael Williamson
08:33 AM Software Development: RE: USB-OTG as a peripheral and a host
Unfortunately I don't have any experience with interfacing with Android phones. If your Android phone supports rndis... Jonathan Cormier
05:14 AM Software Development: RE: USB-OTG as a peripheral and a host
Hello,
I have used RNDIS and have been able to transfer data.
However, I would also like to know how to use eithe...
Preejith S P

02/03/2014

11:43 AM Software Development: multicast routing on mity board
Hi,
I need to set up multicast routing between two interfaces on the mity board running Angstrom linux 2.6.34
...
stephan berner

01/31/2014

05:14 AM Software Development: RE: "Regarding handling UART on MitydspL138F(OMAPL138)"
Hi,
We are trying to interface Second UART (J504 as you mentioned) with Atmel AtXmega Controller so that upon rece...
Naveen K.S

01/30/2014

02:22 PM Software Development: RE: "Regarding handling UART on MitydspL138F(OMAPL138)"
Naveen,
The first UART is used for the debug/console port, UART1.
You would like to use the second UART in your...
Alexander Block
01:17 PM Software Development: RE: "Reagrding spi NOR flash memory updating"
Naveen,
I'm assuming that the question here is how would you get the updated Kernel from your host PC onto the Mit...
Alexander Block

01/23/2014

06:18 AM Software Development: RE: Memcpy data transfer error from FPGA address space to CMEM-allocated data buffers.
Hello Mike,
I've solved the problem! Actually it was a timing problem related to the access policy to the emif.
...
Michele Canepa
05:11 AM Software Development: "Reagrding spi NOR flash memory updating"
Hi Sir,
This is regarding editing the kernel in NOR flash memory, a detailed steps have been given in wiki for edi...
Naveen K.S

01/22/2014

09:19 AM Software Development: RE: Memcpy data transfer error from FPGA address space to CMEM-allocated data buffers.
Dear Mike,
When you say to configure the emif wait states etc., you mean modifying, for example, the file "u-boot-mi...
Michele Canepa

01/21/2014

04:04 PM Software Development: RE: Error libstdc++.so.6
To whom this may concern!...
I had a problem with the file system... Using NFS updated the problem is solved...
Ehsan Kooh
07:31 AM Software Development: RE: Memcpy data transfer error from FPGA address space to CMEM-allocated data buffers.
I think you should setup a chipscope in the FPGA and watch the EMIFA transactions and see if the data is being posted... Michael Williamson
03:23 AM Software Development: Memcpy data transfer error from FPGA address space to CMEM-allocated data buffers.
Dear Sirs,
I have implemented a ping pong buffer to transfer via EMIF some data from a Block-RAM on FPGA to a shared...
Michele Canepa
 

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