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From 06/22/2014 to 07/21/2014

07/21/2014

12:41 PM Software Development: RE: uPP receiving problem
The strange stepping sounds exactly like when optimizations are turned on. Jonathan Cormier
11:46 AM Software Development: RE: uPP receiving problem
I'm not a VHDL guy, so I can't say whether this will work as you have it. It sounds like you and your VHDL guy shoul... David Rice
11:34 AM Software Development: RE: uPP receiving problem
Here you can find the VHDL sources.
I cannot help you a lot with VHDL becuse it is developed by a colleague of mine....
Silvano Bertoldo
11:19 AM Software Development: RE: uPP receiving problem
Thanks a lot.
Now the working principles are clearer.
The problem now is that the software has a strange behaviour....
Silvano Bertoldo
11:09 AM Software Development: RE: uPP receiving problem
Each time you call receive, a DMA is set up to fill the buffer you pass. Once that DMA completes, no data will be tr... David Rice
10:08 AM Software Development: RE: uPP receiving problem
Ok thank you.
I will try to change all the interrupt levels.
Another question is: but once the buffer is filled? Wh...
Silvano Bertoldo
10:05 AM Software Development: RE: uPP receiving problem
I don't see any reason that it wouldn't work, but I have seen issues with some interrupt levels not working. I stron... David Rice
09:59 AM Software Development: RE: uPP receiving problem
Thanks to have a look.
I have the signal enable and start always active.
I think that therefore is right to set bCh...
Silvano Bertoldo
09:49 AM Software Development: RE: uPP receiving problem
A couple of things that I see are different from some code that I have working here:
I use nHWInterruptLevel = 7. ...
David Rice
09:05 AM Software Development: uPP receiving problem
Dear all,
I am trying to use to uPP to receive data coming from the FPGA.
Attached you can find the code I wrot...
Silvano Bertoldo

07/15/2014

04:39 AM Software Development: RE: How to enable PRU Subsystem on MityDSP-L138F SOM ???
Hi Jonathan,
Thank you for your patches, it's working for me!
I have applied and successfully rebuilt my kernel.
...
Ngoc Thanh Pham

07/14/2014

11:39 AM Software Development: RE: How to enable PRU Subsystem on MityDSP-L138F SOM ???
Ngoc,
Can you confirm that this is working for you and i'll move the changes into our main kernel branch?
I als...
Jonathan Cormier
10:51 AM Software Development: RE: How to enable PRU Subsystem on MityDSP-L138F SOM ???
gpioToggle test passed when i just ran it. Not sure why.... Jonathan Cormier
10:24 AM Software Development: RE: How to enable PRU Subsystem on MityDSP-L138F SOM ???
Reran some of the commands to see which fail. The ./PRU_memAccessL3andDDR can cause system segfaults as it appears t... Jonathan Cormier
09:11 AM Software Development: RE: How to enable PRU Subsystem on MityDSP-L138F SOM ???
Running through all the examples, atleast one of them seems to have caused a system segfault as not even reboot was a... Jonathan Cormier
09:09 AM Software Development: RE: How to enable PRU Subsystem on MityDSP-L138F SOM ???
Hi Ngoc,
I have been working on getting this to work. So far i've integrated the patches which i've posted to a t...
Jonathan Cormier
04:45 AM Software Development: RE: How to enable PRU Subsystem on MityDSP-L138F SOM ???
Hi,
Thank you, I'm waiting for your patches. ^^
Regards,
Manh BT
Ngoc Thanh Pham
09:25 AM Software Development: RE: uBoot and USB using L138F SoM
I have been looking into this. It seems that it was a mistake as the added resistor isn't mentioned in our Engineeri... Jonathan Cormier
03:28 AM Software Development: RE: uBoot and USB using L138F SoM
OK, the cable that I used was a miniAB to USB A plug which was then attached to a USB A to USB A gender changer (a li... Simon Edwards

07/13/2014

10:18 PM Software Development: RE: How to enable PRU Subsystem on MityDSP-L138F SOM ???
Hello Manh BT,
The patches Mike described are in the mainline Linux kernel (http://kernel.org/). You can search fo...
Bob Duke
09:42 PM Software Development: RE: How to enable PRU Subsystem on MityDSP-L138F SOM ???
Hi Michael,
Thanks for your information, but where can I get above patches? Is it in Critical Link MDK ?
Regard...
Ngoc Thanh Pham

07/11/2014

01:30 PM Software Development: RE: uBoot and USB using L138F SoM
As per the On-The-Go spec, the mini USB adapter is supposed to tie the USB_ID pin to GND to indicate it should be put... Jonathan Cormier
12:36 PM Software Development: RE: uBoot and USB using L138F SoM
Yep, loading an image seems to be OK. Next week I'll try the whole image + rootfs and make sure that works too.
T...
Simon Edwards
12:20 PM Software Development: RE: uBoot and USB using L138F SoM
OK, now I get it. There's no resistor on my board pulling the ID pin down to 0V. I've just put a link between pins ... Simon Edwards
12:07 PM Software Development: RE: uBoot and USB using L138F SoM
The number is 80-000286RI-2
REV B
S/N 132556
Which bootloader are you using? I've been using my own compilation...
Simon Edwards
12:05 PM Software Development: RE: uBoot and USB using L138F SoM
Whats the part number of your dev kit? Should be a 80- number. Jonathan Cormier
12:03 PM Software Development: RE: uBoot and USB using L138F SoM
I just tested this by first plugging the flash drive into the full size usb port J102. With no luck. Then plugged d... Jonathan Cormier
11:43 AM Software Development: RE: uBoot and USB using L138F SoM
I forgot to say that I know that the USB port works because, once in Linux I can mount the drive OK and read/write fi... Simon Edwards
11:19 AM Software Development: uBoot and USB using L138F SoM
Hi there,
I'm using the L138F SoM on a REV B Industrial I/O board and I am trying to boot from a USB drive. uBoot i...
Simon Edwards
08:31 AM Software Development: RE: How to enable PRU Subsystem on MityDSP-L138F SOM ???
Hi,
I think we need to add the following patches (from linus tree) to the kernel to instantiate the PRUSS drivers ...
Michael Williamson
03:22 AM Software Development: How to enable PRU Subsystem on MityDSP-L138F SOM ???
Hi everyone!
I'm using MityDSP-L138F SOM + IO Industrial Board and now trying to work with PRU subsystem of OMAP-L...
Ngoc Thanh Pham

07/03/2014

02:45 PM Software Development: RE: uPP delay between transmissions
It was a cache invalidation issue. Calling BCACHE_wb() solved the problem.
I did find a small bug in the trasmit()...
Udi Fuchs
08:29 AM Software Development: RE: uPP delay between transmissions
My first thought on seeing this is that it is probably a cache issue. After you set the values in the buffer, the va... David Rice

07/02/2014

06:47 PM Software Development: RE: uPP delay between transmissions
We cannot get the uPP to work. For test we just use the FPGA to pass the uPP pins to FPGA output pin. The Enable pin ... Udi Fuchs
07:19 AM Software Development: RE: uPP delay between transmissions
Ah, yes, I am sorry I forgot about the EMIFA scheduling delays. You are correct.
If you are using the reference P...
Michael Williamson
12:55 AM Software Development: RE: uPP delay between transmissions
We started with EMIFA. We got a delay of 11uSec between transfers as discussed in this post:
https://support.criti...
Udi Fuchs
11:49 AM Software Development: RE: Linker error on DSP application with Code Composer 6
Thanks a lot to everybody.
It was a simple linker problem.
Silvano
Silvano Bertoldo
11:49 AM Software Development: MSGQ - Message Queue Manager problem
Hello everybody.
We see an unexpected behaviour during simple debugging operations.
/*
* main.c
*/
#incl...
Silvano Bertoldo

07/01/2014

04:30 PM Software Development: RE: Linker error on DSP application with Code Composer 6
Note i found the generic c674x device under target: generic devices
!DSP_C674x.png!
Jonathan Cormier
03:39 PM Software Development: RE: Linker error on DSP application with Code Composer 6
Silvano,
Have you followed our guide to building a Hello World application?
https://support.criticallink.com/re...
Greg Dias
11:55 AM Software Development: Linker error on DSP application with Code Composer 6
Dear all,
we are trying to build a simple application on DSP using Code Composer 6 plus DSP/BIOS.
In the followi...
Silvano Bertoldo

06/30/2014

04:18 PM Software Development: RE: uPP delay between transmissions
Have you tried just writing to the FPGA via EMIFA? That would be a 16 2-byte word transfer. Even with 10 wait state... Michael Williamson
03:11 PM Software Development: RE: uPP delay between transmissions
Re-architecting our code is not really a vaiable solution. We have a feedback loop running in the DSP, that depends o... Udi Fuchs

06/28/2014

04:22 AM Software Development: RE: uPP delay between transmissions
Hello,
First of all, using such small packet size you may not be able to completely eliminate the delay between s...
Gregory Gluszek

06/27/2014

08:36 PM Software Development: uPP delay between transmissions
We are trying to use uPP to send data from the DSP to the FPGA. The problem is that there is a delay of about 8 micro... Udi Fuchs

06/26/2014

11:22 AM Software Development: RE: SSD on MityDSP-L138F
Hannes,
As mentioned in the errata, they do not recommend the "reset" approach because they cannot guarantee that ...
Bob Duke
08:25 AM Software Development: RE: Where to download the document about Memory Map and Register Address of...
These are provided by TI. You can find them here: http://www.ti.com/product/OMAP-L138/technicaldocuments
You shoul...
Jonathan Cormier
08:16 AM Software Development: RE: Where to download the document about Memory Map and Register Address of...
The memory map of the OMAP-L138 can be found on TI's main "OMAP-L138 web page":http://www.ti.com/product/omap-l138 (s... Michael Williamson

06/25/2014

10:58 PM Software Development: Where to download the document about Memory Map and Register Address of IO ...
only some brief documents are found in wiki,
Where can I download the document about Memory Map and Register Address...
yanqing lu
04:02 PM FPGA Development: RE: DSP to FPGA SPI Setup Question
Hello,Mike
Thank you very much.
lijun yang
12:42 PM FPGA Development: RE: DSP to FPGA SPI Setup Question
What is your target update rate? Continuous?
You might try first to rip out all of the overhead on the tcDspFpgaS...
Michael Williamson
11:32 AM FPGA Development: RE: DSP to FPGA SPI Setup Question
Hello,Mike
Thank you for your help.
I have attached two pic
----one is the SPI bits transfer rate(This is our des...
lijun yang
10:47 AM FPGA Development: RE: DSP to FPGA SPI Setup Question
Can you check with a scope at what the clock rate is on the SPI device, and the interword write delay? I just want t... Michael Williamson
10:39 AM FPGA Development: RE: DSP to FPGA SPI Setup Question
Update and followup question from the customer:
We have made the SPI work, but transmitting the word to word is sl...
Alexander Block
12:01 PM Software Development: RE: Interrupting the ARM from the DSP
Thanks. This does what I wanted.
On the DSP side:...
Mary Frantz
09:11 AM Software Development: RE: Interrupting the ARM from the DSP
I think that you are confusing signals and interrupts a bit.
You need to write some kernel module code to register...
Michael Williamson
08:26 AM Software Development: RE: Interrupting the ARM from the DSP
Yes, I am familiar with DSPLink and am using it. However, I have time requirement that DSPLink cannot meet. Polling ... Mary Frantz
08:01 AM Software Development: RE: USB2.0 Host on MityDSP-L138F
There you are. Note that i had to change the initialization in the code as noted above. Hannes Klas
07:26 AM Software Development: RE: USB2.0 Host on MityDSP-L138F
If you don't mind, could you post your config.gz file? Michael Williamson
05:37 AM Software Development: RE: USB2.0 Host on MityDSP-L138F
Hey again,
i tried changing it from DMA to PIO. Now, everything seems to work. Device is readable, writable and mo...
Hannes Klas
05:41 AM Software Development: SSD on MityDSP-L138F
Hey folks,
I'm trying to use a SSD instead of a HDD on the L138F.
I found in the errata that the OMAP-L138 has...
Hannes Klas
02:12 AM Software Development: RE: TPS65023 VDCDC2 and VDCDC3 constraints
Jonathan, thank you, I will track your branch. Andrey Mozzhuhin

06/24/2014

05:41 PM Software Development: RE: Interrupting the ARM from the DSP
Hello Mary,
I'm not sure what the problem is in your specific example as we almost always use DSPLink to to commu...
Gregory Gluszek
02:08 PM Software Development: Interrupting the ARM from the DSP
I would like to have the DSP (running BIOS 5) interrupt the ARM (running Linux MDK_2012-08-10)
In the DSP Code:
...
Mary Frantz
12:04 PM Software Development: RE: TPS65023 VDCDC2 and VDCDC3 constraints
Andrey,
Not sure if its any help but I've pushed a work in progress 3.14 branch to our git. Its based off the main...
Jonathan Cormier

06/23/2014

10:25 AM PCB Development: RE: MityDSP-L138 processor running hot
All unused connections are no connects.
Ed Smith
09:59 AM PCB Development: RE: MityDSP-L138 processor running hot
I have attached a plot showing the rise of the supply on the baseboard (channel 2) and the Mity card (channel 1). As ... Ed Smith
09:54 AM PCB Development: RE: MityDSP-L138 processor running hot
What are you doing with unused connections on the module?
Michael Williamson
09:52 AM PCB Development: RE: MityDSP-L138 processor running hot
It remains hot until the next power cycle. A reset cycle alone does not give an improvement.
Ed Smith
09:15 AM PCB Development: RE: MityDSP-L138 processor running hot
On non-FPGA variants, DVDD3318_A, DVDD3318_B, and DVDD3318_C are all tied to 3.3V.
Does the issue only occur durin...
Michael Williamson
09:07 AM PCB Development: RE: MityDSP-L138 processor running hot
All our I/O to the card is 3.3V. The OMAP processor has 3 configurable power groups which can be connected to 3.3V or... Ed Smith
07:56 AM PCB Development: RE: MityDSP-L138 processor running hot
Ok.
I suspect the issue may be related to I/O voltage levels (you have I/Os being driven or pulled to a value larg...
Michael Williamson
07:51 AM PCB Development: RE: MityDSP-L138 processor running hot
We are using a baseboard developed for our application. I'm happy to share the schematic. Let me know how to get that... Ed Smith
07:06 AM PCB Development: RE: MityDSP-L138 processor running hot
Hi Ed,
Are you running on a DevKit or on a custom board? Would you be willing to share your schematic (privately ...
Michael Williamson
05:32 AM PCB Development: MityDSP-L138 processor running hot
We are some way into the development of using the MityDSP-L138 platform. I recently noticed that about 50% of the tim... Ed Smith
 

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