Activity
From 09/19/2011 to 10/18/2011
10/18/2011
- JP 02:48 PM ARM9 Based QNX Platforms Software Development: RE: ClockPeriod
- Rob,
With regards to the syspage, I was hoping to see values change after changing the ClockPeriod. Sections relating to time and clocks seemed like good candidates. If the x86 shows changes in one way and the omap shows changes in a ... - RG 02:37 PM ARM9 Based QNX Platforms Software Development: RE: ClockPeriod
- John,
I just tried the above mentioned change, and as you suspected it did not fix the problem but was worth a try.
Regarding the pidin info, could you let me know what section of the syspage you would like to see. I did capture th... - RG 02:38 PM ARM9 Based QNX Platforms Software Development: RE: QNX BSP Timers
- John,
We have tried using ClockCycles(). I think it may be working for us but will check with the other developers to make sure.
Thanks,
Rob
10/17/2011
- JP 10:06 AM ARM9 Based QNX Platforms Software Development: RE: QNX BSP Timers
- Rob,
Have you tried using ClockCycles()?
John - JP 10:02 AM ARM9 Based QNX Platforms Software Development: RE: ClockPeriod
- Rob,
I see your point.
We have not provided the arm clock handling routines so in that sense, this would seem to be the arm-specific part of QNX. My understanding though, is that the kernel gets things like device specific handling...
10/13/2011
- RG 12:33 PM ARM9 Based QNX Platforms Software Development: RE: ClockPeriod
- John,
Actually, the point I was trying to make is that changing the system tick using ClockPeriod confuses the OS concept of time, which shouldn't happen. Using the attached program this is what happens:
# ./clock_period
ClockPer... - JP 09:16 AM ARM9 Based QNX Platforms Software Development: RE: ClockPeriod
- Rob,
I don't have experience trying to change the clock period. The documentation does seem to indicate that making the period very small can result in significant overhead in the system from all the interrupts. (see clock_setres() a... - JP 08:54 AM ARM9 Based QNX Platforms Software Development: RE: QNX BSP Timers
- Rob,
I don't know of a feature like this. I have always just used the CLOCK_REALTIME.
John
10/12/2011
- MW 04:01 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: HelloWorldDSP.out syntax error
- Hi Peter,
Thank you for your feedback. We'll try to update the Hello World page and address your comments. The challenge of course is that many tools (e.g., CCS from TI and eclipse in general) continue to migrate and change and we m... - PS 03:19 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: Reflections after building DSP "Hello, world!"
- I managed to compile the DSP Hello World...*finally*.
(Using Version: 4.2.4.00033 of CCS on WinXP)
I noticed a few of issues when following the guide at:
http://support.criticallink.com/redmine/projects/arm9-platforms/wiki/DSP_Hel... - Hello,
We are trying to debug a uPP application and routed the chan A and Chan B signals through the fpga to connector J104. The Industrial IO data sheet lists 10 of these pins as LVDS pairs and mentions added termination resistors f...
10/11/2011
- Hello,
I am having problems changing the system clock period using the QNX BSP. When I try to change it using the ClockPeriod function, it sets a value that confuses QNX as to the correct time. For example, if I try to change the pe... - Hello,
I have a need for a timer that supports a higher resolution than QNX CLOCK_REALTIME. It will be used for high accuracy timestamps, but probably will not need to drive an interrupt.
Is a feature like this already supported i...
10/10/2011
- MC 03:36 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: HelloWorldDSP.out syntax error
- those binaries were a great sanity check for me. you guys might consider posting them to the quick start page.
Mike
10/06/2011
- Hi,
After transferring the jffs2 filesystem via uBoot, using the "nand write.jffs2 C2000000 0 <>" command, is there any method to check whether the file system is fine - before starting kernel - in order to detect block errors or possi...
10/03/2011
- SW 03:48 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uPP digital loopback
- Greg,
I'm using the default ASYNCH3 clock which is PLL_SYSCLK1 I think. This should be divided down automatically. Since I am just using this to test the uPP I won't worry about it and keep the Chan A and Chan B clock divisors equal... - GG 01:49 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uPP digital loopback
- Hi Scott,
As far as I know we have not seen any issue like what you're describing when using a uPP clock driven by the FPGA. Given, we haven't done much work with the uPP in DLB, so it could be a problem unique to that setup.
Anoth... - Hello,
I have a linux driver module to test the uPP in digital loopback. I saw some odd behavior in regards to the clock divisors on Channels A and B. I have the module set to loopback 64 bytes from channel A to channel B. If I se...
09/30/2011
- ME 06:30 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Additional serial port on the MityDSP Profibus dev-kit
- Just thought I'd add a note in case some one else stumbles upon this thread:
Ended up using a Prolific usb-to-serial device that was laying around the office.
I had to build a new kernel with support for usb-to-serial devices and th...
09/29/2011
- Are there test points available on the MityDSP-L138F for the following uPP signals?
'UPP_CHA_ENABLE' = L138 Pin#U16 to FPGA Pin#H5
'UPP_CHA_START' = L138 Pin#W15 to FPGA Pin#C1
'UPP_CHA_CLOCK' = L138 Pin#U17 to FPGA Pin#H7
Than... - SW 10:40 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: upp clock
- Greg,
Thanks for the reply. My question was more of how the clocks are setup on the board as a default. I suspected that the clocks were standard with the the uPP xmit clock 300/4 MHz. I found my problem with the uPP code in the en... - ME 08:30 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Additional serial port on the MityDSP Profibus dev-kit
- No, I don't think ssh would work. It has to be something I could open and interact with just like a com port from my code, I'm not sure you can do that with ssh? Either way the recieving end is a windows box and it seems unlikely there w...
- MW 08:18 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Additional serial port on the MityDSP Profibus dev-kit
- (re: comm over ethernet)
Is ssh acceptable? "ssh root@mitydspaddr"
-Mike
- MW 08:17 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Additional serial port on the MityDSP Profibus dev-kit
- The default kernel and root filesystem may "just work". If you plug in the device you should see some messages about it and the device should appear as /dev/ttyUSB0. If that doesn't happen, then you'll need to run make menuconfig and a...
- ME 08:13 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Additional serial port on the MityDSP Profibus dev-kit
- Hmm, I don't really need a physical port. Is there any com over ethernet software availible for these systems?
/ Mattias - ME 08:10 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Additional serial port on the MityDSP Profibus dev-kit
- Thanks for the speedy reply!
One extra port should suffice. I'll order one of the keyspan adapters right away.
I'm using the MityDSP-L138 SoM. Can you point me in the right direction for properly configuring the kernel?
I guess i... - MW 07:49 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Additional serial port on the MityDSP Profibus dev-kit
- Hi Mattias,
I think that your best (or easiest) bet would be to use a usb-to-serial adapter on the Host (USB1) port. If you need more than one, you should be able to use a (powered) hub and attach multiple units. We have used Keyspa... - Hi, I'm wondering what the best way to get an additional serial port is? Is there support for usb-to-serial adapters?
I'm developing something that will need to have both serial, profibus and ethernet support for data transfer and wi...
09/28/2011
- GG 04:35 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: upp clock
- Hi Scott,
The fastest you will be able to get the uPP transmit clock to run with your setup is 75 MHz.
From the Upp User's Guide:
"The fixed divisor restricts the maximum speed of the I/O clock to one-fourth the device CPU cloc...
09/27/2011
- I have a userspace upp driver that I am trying to test in loopback mode. I am trying to loopback 1 line of a memory buffer (4096 bytes). I am polling the status register and when it catches the status registers for Q and I appear to ha...
09/23/2011
- We are looking at getting the L138-FI-225-RC that comes with a Spartan 6SLX45. What is the complete FPGA part number that comes on this board?
Thanks,
-Brian
09/21/2011
- SW 05:09 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uPP/DMA registers
- Mike,
I have a couple questions here. I am attempting to write a upp userspace loopback driver/routine. I have memory mapped the pin mux registers, PSC1 registers and the upp registers. I am unsure if the pin mux changes are in eff... - MW 07:51 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Interrupt to ARM side
- Hello Mr. Pailwar,
On the board support package/MDK, in the file sw/ARM/linux/drivers/fpga/fpga_ctrl.c there is some example code of handling interrupts from 2 pins that our framework uses for letting the FPGA interrupt the ARM. We u... - MC 07:29 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: HelloWorld dsplink Code composer 5
- Hi Finn
Call me...
/Mads
09/20/2011
- Hello,
I want to generate an interrupt from the FPGA to ARM side of the MityDSP-L138/F board. Is there any example available for doing that and how to make the application aware of the interrupt.
With regards
Pankaj
- MW 10:18 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: FPGA clock
- On the module itself, the EMA_CLK clock (B7) of the OMAP-L138 is connected to the FPGA. We generally use this clock for most of the core framework we provide. Given the EMIFA must run on this domain, it's convenient and allows us to av...
- Are there any dedicated pins on the FPGA for a clock input? In the IndustrialIO.bin designs do you just use the 100 MHz EMIFA clock as the FPGA input clock? Thanks, Scott
09/19/2011
- MC 05:45 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Mounting USB Flash Memory (mitydspl138)
- Hey Fred,
Yup you were right. After I re-built the kernel with USB Mass Storage support it auto mounted just fine. Thanks for chiming in.
Mike - MC 05:38 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Errors when building custom kernel .config file
- Hi Greg,
From your response I got the sense that this is the sort of thing that should have just worked, so I just tried again & of course it worked. I closed all my shells, opened a new one and went from there. The one hitch was th... - MW 09:04 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: HelloWorld dsplink Code composer 5
"sure about CC4 ?? to me, the 'howto' looks like it's made with CCS3.xx....."
It's not. It's CCS4. It's Clearly eclipse based, unless we are looking at different web pages. I am looking at the [[DSP Hello World]] page. I guess ...- FB 08:58 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: HelloWorld dsplink Code composer 5
- Hi Mike,
what about unofficial then ?? :-)
sure about CC4 ?? to me, the 'howto' looks like it's made with CCS3.xx.....
maybe somebody else has done this ???
/Finn
- MW 07:16 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: HelloWorld dsplink Code composer 5
- Hi Finn,
We have not used CCS5 (officially) here yet.
The Helloworld with DSP link application on our wiki [[DSP Hello World]] was compiled using CCSV4 and several of our developers have migrated to CCSV4 some time ago.
Just wan... - Hi Folks,
Has anybody done the HwlloWorld-dsplink on CCS5 ?? maybe CCS4 ??
best reg
Finn