Activity
From 06/08/2012 to 07/07/2012
07/06/2012
- I’m designing a carrier board to host the MityDSP-L138F and would like to use the plated through holes at the edge of the module to solidly mount it to my carrier board. I know the location of the plated through holes relative to the mod...
- MW 07:52 AM FPGA Development: RE: What‘s the configuration mode of the FPGA？
The EMA_WE (B9) pin of the OMAP-L138 is connected to the CCLK (R15) pin on the FPGA for slave select configuration. The WE pin is used during the EMIFA write cycle as a controlled clock to drive the FPGA CCLK during configuration whil...
07/05/2012
- YL 11:40 PM FPGA Development: RE: What‘s the configuration mode of the FPGA？
- Hello Mike，
I still have a question. I found out in the MityDSP-L138F Carrier Board Design Guide that you connected the pin EMA_WE/GP3[11] of L138 to CCLK pin of FPGA. But the FPGA configuration document suggests DSP's CLOCK pin conn... - GG 05:12 PM Software Development: RE: Using RMII with MityDSPL138 and L138F.
- Hi Michele,
I've worked on a project using the RMII before, and as far as I remember we needed to select the correct interface as described in the link Tim provided, and we also needed an FPGA build to route some of the RMII signals.... - EB 02:10 PM PCB Development: RE: USB0_ID on MityARM-1810 PROFIBUS DK
- FYI Mike,
Our cable is a A to mini-B and pins 4&5 are not shorted.
USB0_ID is always low regardless of cable presence.
The AM1808 SPRS653C 2.7.17 says that USB0_ID is an analog input w/o a pullup.
They don't say that it needs an ... - TE 01:10 PM PCB Development: RE: USB0_ID on MityARM-1810 PROFIBUS DK
- Mike,
I am working with Emmett on the software side. I have ported the usb_dev_bulk example into the UART example, removing the LCD calls because I do not have a display attached. I am calling the USBDBulkInit(0, (tUSBDBulkDevice *)... - MW 12:44 PM PCB Development: RE: USB0_ID on MityARM-1810 PROFIBUS DK
- Hello Mr. Bradford,
1. There is no pullup on the MityARM-1810F SOC for the USB0_ID pin (though there is likely one in the AM1810 itself, not sure of the default configuration off hand).
2. There is no connection to the FPGA for any... - We are using MityARM-1810F on the PROFIBUS DK board.
We are trying to use the TI starterware examples to get USB0 to act as a peripheral.
The USB0_ID is always low regardless of the cable attach.
1. Is there a pullup on the MityARM-...
07/04/2012
- MC 09:29 AM Software Development: RE: Using RMII with MityDSPL138 and L138F.
- Hi Tim,
thanks for the link.
I will try that way.
Thank you very much.
Best Regards,
Michele Canepa
- TI 09:23 AM Software Development: RE: Using RMII with MityDSPL138 and L138F.
- Michele,
We have used the RMII configuration on a job. I do not recall any issues (our "experts" on this subject are currently on vac). There is a wiki page ( http://support.criticallink.com/redmine/projects/arm9-platforms/wiki/Network_... - Hello Sirs,
I'm evaluating the possibility to use the RMII interface instead of MII in order to interface the MityDSP Card with a RMII compatible ethernet PHY, on a custom motherboard.
This option is useful for me because of pin mux ...
07/01/2012
- DG 10:35 PM Software Development: RE: Debug problem
- Hello Mike!
I am using a VM from the Critical Link's DVD (MDK 2011/03/31, arm-angstrom-linux ver. 2010.7-test-20101118)
My problem is solved by adding links as in wiki's "GDB dependency hassles", but like this:
sudo ln -s /usr/lib/lib... - MW 12:11 PM Software Development: RE: Debug problem
- Hi,
Which version of the toolchain / VM are you using?
Did you install on your own linux build machine or are you using a VM provided by Critical Link?
-Mike
06/30/2012
- Hello!
I am trying to establish debug session in accordance with wiki's Debugging ARM Apps with Eclipse.
As it said, I have got a library error message "/usr/local/angstrom/arm/bin/arm-angstrom-linux-gnueabi-gdb: error while loading sh...
06/29/2012
- TI 07:12 AM Software Development: RE: chip clocking
- Stéphane
The input clock on the L138 is indeed 24MHz. The max CPU speed on the L138F is actually 456MHz.
I will have the marketing folk look into correcting the table in the overview document.
sorry for any confusion.
cheers
/Tim - Hello,
How fast is the input clock of the omapl138 on the MityDSP-L138F?
Due to the MityDSP family overview, where the CPU speed is given with 450MHz, I assume a 25MHz input clock (instead of a 24MHz one on TIs EVM-Board).
Is this c...
06/26/2012
- YL 09:34 PM FPGA Development: RE: What‘s the configuration mode of the FPGA？
- Thanks very much.
- MW 08:58 AM FPGA Development: RE: What‘s the configuration mode of the FPGA？
- Hello Mr. Lu,
The FPGA is configured using 8 bit parallel slave select mode via the EMIFA bus connection to the Omap L138 processor. The wiki has a section about programming the device using either uBoot or Linux drivers. While unc... - TC 10:29 AM Software Development: RE: KSZ8995MA Ethernet Switch Support
- Charlie -
Thanks for the update, great news!
Tom - CK 09:48 AM Software Development: RE: KSZ8995MA Ethernet Switch Support
- Mike
I have finally got the switch to work. The last problem was that I had set the CONF0-CONF2 bits to 0x110, which sets MAC 5 to MAC operation. I have now set it to PHY (0b101) and I can now connect to the network.
Thanks for all...
06/25/2012
- Hello,
We are using the MityDsp-L138F board. I want to know the FPGA's configuration mode on the board, is it MASTER SPI,BPI or slave SPI ,BPI? We can find nothing about pin M0&M1 of FPGA in the datasheets.
Anybody can tell me?
...
06/20/2012
- MW 07:14 AM Software Development: RE: Building new openembedded-core based system from scratch
- At the moment, we cannot expose the full repository as there is proprietary data stored in it.
We need to work with our team to sort out how to either push a cloned repository with the bits of proprietary data removed or periodically ...
06/19/2012
- DG 11:55 PM Software Development: RE: Can't ping by name
- Hello, Mattias!
I have installed resolvconf package after reading your post. Anyway /etc/resolv.conf still beeing empty.
My /etc/network/interfaces:
auto eth0
#iface eth0 inet dhcp
iface eth0 inet static
address 17.6.210.251
netm...
(posted on behalf of a customer)
I would like to build a dev environment from scratch if possible and am following the beta instructions for building the new openembedded-core based system
The build is failing because of a refe...
06/18/2012
- ME 09:20 AM Software Development: RE: Can't ping by name
- I think the dns-* options in /etc/network/interfaces require that you have the resolvconf package installed. Do you have it?
- DG 01:51 AM Software Development: RE: Can't ping by name
- Solved! Thank you!
The only disadvatage is the /etc/resolv.conf file is rewritten (by udhcpc?) on reboot.
I wonder the dns-nameserver parameter in the /etc/network/interfaces has no meaning, even for static ip configuration?
06/15/2012
- MW 07:30 AM Software Development: RE: Can't ping by name
- We've noticed that the DNS doesn't get updated automatically as well.
If you know your DNS server, as a workaround, add the following entry to /etc/resolv.conf (you may need to create this file if it's not there). - Hello!
Problem is I can't ping any host by name (got "bad address" error), but no problem with ping by IP. I guess it is related to DNS. How can I solve it? (sorry for stupid question, I am nub). Ping to DNS server which I have assigned...
06/14/2012
- MW 08:09 AM Software Development: RE: The Jtag Interface
- If you need more or you did not buy the development kit, the part number for the interface is 80-000286LC-1A. If you contact critical link someone should be able to help you get one.
-Mike
06/13/2012
- AS 05:19 PM PCB Development: RE: MityDSP-L138F Footprint Question
- 20mils is a mechanical tolerance for DDR2 connector placement
- MW 02:10 PM PCB Development: RE: The schematic of MityDSP-L138 Development Kit
- Actually, the schematics for the baseboards may be found here:
"Industrial I/O Revision Information":http://support.criticallink.com/redmine/projects/indio/wiki/Industrial_IO_Revision_Information
-Mike
- TC 12:44 PM PCB Development: RE: The schematic of MityDSP-L138 Development Kit
- Hello Yilin -
I will e-mail you a link to download the design files for the MityDSP-L138 base board.
Thank you for using our product.
Tom - (posted on behalf of a customer)
which voltage level your EMIFA-Pins are configured? Is it 1,8V or 3,3V? - BL 09:23 AM Software Development: RE: Downloading and Installing the Virtual Machine?
- The Wiki page (http://support.criticallink.com/redmine/projects/arm9-platforms/wiki/Linux_Build_VM) has been updated with a link to download the Virtual Machine. Please be advised that the image is large so download times will be length...
- CK 06:31 AM Software Development: RE: KSZ8995MA Ethernet Switch Support
- Mike
I am using mii-tool to test that mii interface. I have used ths before with no problem, but now I get a linux error status as per the attached file. Any ideas what I have set wrong?
regards
Charlie - CK 04:47 AM Software Development: RE: KSZ8995MA Ethernet Switch Support
- Mike
Thanks for that. Now the spi interface works (but not the switch). I now get the following at boot up.
Micrel KS8995 Ethernet switch SPI driver version 0.1.1
Micrel KS8995 Ethernet switch SPI driver KS8995MA Probe Entered
Mi... - TI 06:14 AM Software Development: RE: The Jtag Interface
- The development kit comes with a small adapter board that connects to the hirose connector on the SOM and provides a standard 14 pin JTAG header.
cheers
/Tim
06/12/2012
- BB 10:49 PM Software Development: RE: Downloading and Installing the Virtual Machine?
- Me too. I am still interested a link to the new image.
- YW 10:35 PM Software Development: RE: Downloading and Installing the Virtual Machine?
- Hi, mike
Can you post the link to me?
thanks
- The JTAG Interface of MityDSP-L138 is different with my XDS510. There is a convert board for it? How can I use the MityDSP-L138 with XDS510.
- I want to design a Carrier Board of MityDSP-L138. The MityDSP-L138 Carrier Board Design Guide is too simple. Where can I download the schematic of MityDSP-L138 Development Kit? Thanks.
- MW 07:19 AM Software Development: RE: KSZ8995MA Ethernet Switch Support
- Ok Charlie,
You need to do a little more work on your baseboard file. You need to make sure you strip out all of the stuff that isn't on your host board.
The culprit, I think, is that you are still calling baseboard_setup_mcasp(),... - CK 03:02 AM Software Development: RE: KSZ8995MA Ethernet Switch Support
- Mike
I have attached the .config and a copy of the dmesg with the L138 SOM board plugged into our dev board and also with it plugged into the industrialio board.
I am not sure what you mean about SPI_MAX_CHIPSELECT. Do I have to in...
06/11/2012
- MW 08:35 PM Software Development: RE: KSZ8995MA Ethernet Switch Support
- Hi Carlie,
Can you attach your .config file and the dmesg outputs? The SPI_MAX_CHIPSELECT is a good catch. That needs to be fixed upstream, sometimes those guys get a little nuts trying to save a couple of bytes. The davinci spi ca... - CK 10:35 AM Software Development: RE: KSZ8995MA Ethernet Switch Support
- Mike
I am back on this project after being called to sort some problems out.
I have sorted out the hardware issues and I belive that this is now correct.
I have edited/added to the baseboard file, (see attached) but with no suc... - The attached file contains TI's OMAP-L138 / AM1808 StarterWare package with additional examples for the MityDSP-L138 and MityARM-1808 SOMs. To work with the examples, open CCS 5 and choose [BASE_DIR]\ OMAPL138_StarterWare_1_10_03_03\bui...
- The attached UBoot image contains an update to the bootelf command that fixes the problem where bootelf hangs when launching some of the Starterware examples. Please use this image until the updated UBoot code is officially released whi...
- DG 09:51 AM Software Development: RE: SATA HDD problem
- Thanks, Mike. You are right.
- MW 07:02 AM Software Development: RE: SATA HDD problem
- Looks like the drive you are using is a SATA III (Gen3) Drive. There is an "errata":http://www.ti.com/lit/er/sprz301h/sprz301h.pdf from TI for the OMAP-L138/AM-1808 that says that SATA III drives will work sync up with the controller on...
- Hello!
I am trying to connect SATA HDD to Industrial IO devkit, but there is a problem. Boot log:
06/08/2012
- MW 03:55 PM PCB Development: RE: RTC 3V BATT Connection when not using RTC?
- Ground it.
-Mike
- (posted on behalf of a customer)
Quick question: hopefully an easy one to answer. If I don’t want to use a battery backed up RTC on the MityDSP-L138F what should I connect the 3V RTC BATT (pin 35) line to? Should it be connected to sy... - MW 08:16 AM PCB Development: RE: RTC Battery Drain
- Hi,
There has been an "Errata":http://support.criticallink.com/redmine/projects/arm9-platforms/wiki/Module_Product_Change_Notifications published for the MityDSP-L138 SOMs that includes a higher than expected RTC battery current consu... - JH 03:41 AM PCB Development: RE: Adding a SPI peripheral through J700 on industrialIO board
- Hi Mike:
Sorry about the setting of menuconfg, the format is error.
already check are
Debug support for SPI drivers
SPI controller driver for DaVinci SoC's
SPI controller driver for DaVinci/DA8xx SoC's
User mode SPI dev... - JH 03:37 AM PCB Development: RE: Adding a SPI peripheral through J700 on industrialIO board
- Hi Mike:
We are designing a spi device under SPI1 and already success create chip select from OMAP GPIO.
But how can we write linux application programs? Because we can't see any /dev/spi*.
The menuconfig device drivers -> SPI suppo...