Mity CPU Platforms

09/26/2014

09:11 PM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RE: Spurious Reboot Debug

Would you be willing to share (privately, not on the forum) your baseboard schematic?
-Mike Michael Williamson

08:19 PM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RE: Spurious Reboot Debug

Michael,
Thanks for the replay. No problem with the many questions.. I'm kind of at a loss tracking down the iss... Michael Karasoff

02:27 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: GP0[4] state on boot for L138F

??How quickly do you need it to be low? You might put an external pull down on your board.??
Pretty much instantly... Mostafa Afgani

09/25/2014

07:46 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: GP0[4] state on boot for L138F

How quickly do you need it to be low? You might put an external pull down on your board.
You could disable the pu... Michael Williamson

05:11 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: GP0[4] state on boot for L138F

Hi Mike, thanks for the explanation. As we need this pin to be low on power-up, would the best place to set this be i... Mostafa Afgani

03:40 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: GP0[4] state on boot for L138F

Hi,
If you check the OMAP-L138 datasheet (it's a bit convolved) Table 2-29, the GP0[4] pin pullup state is defined... Michael Williamson

03:28 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: GP0[4] state on boot for L138F

Hi, we noticed that the power on state of GPIO_0_4 is that it is driven high. I am a little confused about this since... Mostafa Afgani

09/24/2014

05:59 PM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RE: Spurious Reboot Debug

Hi Mr. Karasoff,
Are these MityARM-3359s? What is the model number? Do you also have a couple of serial numbers ... Michael Williamson

05:28 PM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: Spurious Reboot Debug

Hi,
I am having an intermittant issue with the MityARM on some (not all) of our custom carrier boards - The proces... Michael Karasoff

09/23/2014

02:05 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: UPP problem

Problem was caused by cache incoherency. Use of BCACHE_inv() fixed it. stephan berner

09/22/2014

10:19 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: USB Bug

There are several missing features in the 3.14 branch that I found when trying to move to it. I created a tag to mark... Jonathan Cormier

10:13 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: USB Bug

Note that we have seen a similar issue on the 335x. Could you checkout the following page and report back if the solu... Jonathan Cormier

10:11 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: USB Bug

It is from your git page - as far as I remember. Our software student tried to jump to 3.14 two month ago but it didn... Benedikt K.

09:39 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: USB Bug

Hello,
Are you using a 3.7 branch from our git site, or the mainline? I don't think we officially support 3.7. D... Michael Williamson

09:37 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: USB Bug

Another thing: When I plug in the first usb device the number of usb interrupts in /proc/interrupts increases. When I... Benedikt K.

09:22 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: USB Bug

Hej hej,
we have noticed a usb bug on the MityDSP and we are not sure why this happens.
We are using linux 3.7.... Benedikt K.

09/21/2014

02:51 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: UPP problem

hi,
I am having problems reading data from the FPGA to memory. I set up the UPP interface
using channel A from t... stephan berner

09/18/2014

10:07 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: Mity L138F FPGA -> OMAP interrupt lines

Thanks Mike,
I have found the pin mapping for INT0 and INT1 I couldn't find the mapping for the Non Maskable Inte... Christopher Brunson

09:48 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: Mity L138F FPGA -> OMAP interrupt lines

Hi Chris,
The information you need is in Table 4 of the "Carrier Board Design Guide":http://www.criticallink.com/w... Michael Williamson

09:36 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: Mity L138F FPGA -> OMAP interrupt lines

I was trying to use an FPGA interrrupt which should be serviced by the DSP core in the OMAP.
From the MityL138.ucf... Christopher Brunson

09:07 AM MityDSP (TI TMS320C6xxx Based Products) FPGA Development: RE: Mity L138F FPGA -> OMAP interrupt lines

Sorry about that I thought this was the ARM9 forum, I will repost it there.
Chris B. Christopher Brunson

08:40 AM MityDSP (TI TMS320C6xxx Based Products) FPGA Development: RE: Mity L138F FPGA -> OMAP interrupt lines

Hi Chris,
This post, if for an L138 module, should be in this other forum:
https://support.criticallink.com/red... Michael Williamson

08:32 AM MityDSP (TI TMS320C6xxx Based Products) FPGA Development: Mity L138F FPGA -> OMAP interrupt lines

I was trying to use an FPGA interrrupt which should be serviced by the DSP core in the OMAP.
My FPGA pin map for ... Christopher Brunson

09/17/2014

02:36 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Standard USB peripheral connection on MitySOM eval Board

Hi,
I'm now quite stuck without the ability to use use the host mode.
I have noticed on Rocketboards something ... Pierre-Yves BRETECHER

11:29 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Load FPGA Timeout Error

Max,
Thank you for posting that.
You are correct that if VBAT is too low the module will either not boot at all... Alexander Block

10:41 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Load FPGA Timeout Error

Hi Dan,
I had similar problem last week. After two week I tried to run my development board loading the FPGA with ... Massimo Buratto

09/16/2014

09:55 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Adding SPI flash

The part works in SPI mode 0 or 3, but I tried all four modes (0 - 3). I also tried setting the fields .c2tdelay and... Mary Frantz

09:45 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Adding SPI flash

Is the SPI mode field correct (polarity and phase, CPOL and CPHA is the part in SPI_MODE_0)?
You also look like y... Michael Williamson

09:06 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Adding SPI flash

I confirmed with a scope that the chip select was not active.
I added DA850_GPIO2_15 to the the array of gpios in ... Mary Frantz

08:49 AM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RE: Pin mapping option for Carrier board design

This depends on at which stage you want access to the pins. Both u-boot and the kernel make changes to the pin mux. ... Jonathan Cormier

09/15/2014

04:29 PM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RE: Pin mapping option for Carrier board design

I see. Thank you.
And how am I be able to change them?
Zhe Zhe Ji

09/12/2014

09:19 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Adding SPI flash

It would not apply (different driver, different logic handling platform arguments). Michael Williamson

09:17 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Adding SPI flash

Note that if you want to use the hardware designated chip select for that spibus instead of a gpio then the SPI_INTER... Jonathan Cormier

09/11/2014

06:34 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: U-Boot with large uImage containing initramfs

Hi Nicholas,
A little confused. Your build_ramdisk_image.sh appears to be building a 1 GB image for loading an SD... Michael Williamson

06:18 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Adding SPI flash

Hi Mary,
Have you configured the pin-mux for the DA850_GPIO2_15, which would correspond to the chip select you are... Michael Williamson

01:20 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: Adding SPI flash

We have a SPI serial flash device on our board, an M25PE80. It is connected to SPI1 with SPI1_CS1.
I created a ba... Mary Frantz

09/10/2014

04:03 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: U-Boot with large uImage containing initramfs

Michael Williamson wrote:
> We've run into this issue before on a different ARM based processor.
>
> The problem ... Nicholas Crast

01:46 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: DSP HelloWorld Message Queue Buffer Length

Thanks for the clarification on the message handler code, and the message structure recommendation.
It definitely w... Doug Browning

11:01 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: DSP HelloWorld Message Queue Buffer Length

Doug,
As far as I understand the anLength is really the length of the buffer passed between the DSP and ARM and is... Jonathan Cormier

10:01 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: DSP HelloWorld Message Queue Buffer Length

I'm modifying the DSP HelloWorld example code from the Wiki site to transfer data types other than strings (see SW Fo... Doug Browning

08:41 AM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RE: Pin mapping option for Carrier board design

Have you looked at this wiki page?
[[Pin Out]] Jonathan Cormier

09/09/2014

06:02 PM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: Pin mapping option for Carrier board design

Hi,
I am now designing a carrier board for MitySOM335.
In the design guide, it mentions:
The I2C1 and I2C2 int... Zhe Ji

09/03/2014

01:24 PM MitySOM-5CSX Altera Cyclone V Software Development: dma_free_coherent error in Kernel driver

I am having problems DE-allocating DMA memory space. Allocation works correctly with dma_alloc_coherent. I get the fo... Julio Liriano

09/02/2014

08:33 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: How to probe the fpga_ctrl & fpga_gpio.ko module

Have you made any progress with this problem? Jonathan Cormier

08/29/2014

12:23 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Compiling Memory Size into U-boot

I think I see my error.
The ubootenv.bin file doesn't go into any of the three partitions generated by that automat... Julio Liriano

10:09 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Compiling Memory Size into U-boot

From that script to combine the uBoot image with the rootFS as well as the uBoot blob, I gleaned that
to write the ... Julio Liriano

08/28/2014

05:20 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Compiling Memory Size into U-boot

We actually create the environment using *mkenvimage*, which takes a text file and then store this on the SD card, wh... Daniel Vincelette

04:57 PM MitySOM-5CSX Altera Cyclone V Software Development: Compiling Memory Size into U-boot

I read this link:
https://support.criticallink.com/redmine/projects/mityarm-5cs/wiki/ARM_Software_FAQs
And I kno... Julio Liriano

04:20 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: U-Boot with large uImage containing initramfs

I have attempted the following:
1.) Create .tar.gz rootfs with yocto
2.) Create ext3 ramdisk image of rootfs
3.)... Nicholas Crast

12:42 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: U-Boot with large uImage containing initramfs

Michael Williamson wrote:
> We've run into this issue before on a different ARM based processor.
>
> The problem ... Nicholas Crast

07:55 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: U-Boot with large uImage containing initramfs

We've run into this issue before on a different ARM based processor.
The problem is the linker for the kernel is p... Michael Williamson

12:37 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Memory Aligned Byte Array

Mike,
I will definitely need more than a single 4096 byte page. I can
call __get_free_pages() to allocate a con... Julio Liriano

11:42 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Memory Aligned Byte Array

Any kernel memory allocation is going to be page aligned (4K), it has to be. That's how the linux kernel memory mana... Michael Williamson

11:19 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Memory Aligned Byte Array

Mike,
I'm writing a device driver to handle this DMA setup. I want the kernel to give me a chunk of physical memo... Julio Liriano

07:09 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Memory Aligned Byte Array

Not entirely sure what you are up to here.
Is your linux application running in user space? If it is, you may nee... Michael Williamson