Activity
From 08/18/2012 to 09/16/2012
09/16/2012
- Like to seek your help on an uPP related question. I plan to burst out I and Q data from memory using the two uPP channels to the FPGA. In fact, I plan to drain most of the 256MB RAM using multiple DMA calls (if required). I see from ...
09/15/2012
- MW 06:56 AM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- Hi Matt,
Did you get through this, do you still need assistance?
-Mike
09/14/2012
- FT 06:24 PM Software Development: RE: Problem with uPP in DLB
- Greg,
Thanks for answer.
By the way, do you have a dummy FPGA load (in .bin format) that output "known fake data" on uPP?
It can be very very very useful.
Thanks!
-François - GG 05:15 PM Software Development: RE: Problem with uPP in DLB
- François,
Glad to hear that fixed your problem!
In regards to your follow up question, yes, you will most likely need to invalidate the cache on your receive buffer each time before passing it into the DspUpp receive function in ...
09/13/2012
- FT 02:43 PM Software Development: RE: Problem with uPP in DLB
- Greg,
You was right on and you make my day!
Now, I have another question regarding the cache. I used the uPP in DLP mode for uPP driver integration. However, it is a temporary solution because our FPGA is not yet ready. When our FP... - GG 02:24 PM Software Development: RE: Problem with uPP in DLB
- Hi François,
We have not done any work with running the system in digital loopback mode. The fact that you are getting a response back and not just hanging on the receive mailbox is a good sign. The pinmuxing should not matter as dig... - I am trying to use uPP in DLP mode with an MityDSP1810F board but my rx buffer is still empty after a "ransaction.
I am using modified version of DspUpp.cpp file.
Here code snipped
*buffer.c*
09/12/2012
- We are using uPP in our design - UPP XDx signals & BOOT function are muxed, what must I do?
- I am actually design an eval board using your L138 module. I am wondering if I need to care about the BOOT pins (muxed with others fonctionalities), so that your L138 module will properly boot, or is that done within your L138 module.
D...
09/11/2012
- We need to switch power off to the entire card based on USB activity.
Any easy way to do this?
Also how long is the boot time to load the OMAP code and FPGA code from NVRAM from power up to being able accept commands from the USB? - MW 03:27 PM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- It's the same thing. It got branded with two names early on. Profibus really only works with the MityARM-1810, as there is a licensing restriction on the PRU microcode that runs the profibus stack. You can evaluate it using the other ...
- MM 02:38 PM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- I guess now is a good time to ask, I'm not sure industrial I/O devkit or the PROFIBUS Development Kit, or if there is even a difference between to two. This question came up before and I guess we might as well just ask the expert.
Th... - MW 12:07 PM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- Hi Matt,
All of the images on the example site are for an LX16, which (I thought) was the standard size FPGA for modules delivered with the Industrial I/O DevKit boards. The images for the LCD on the wiki page are for LX16 based modu... - MM 11:56 AM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- *Edit*
The board acually says REV A, not sure if it matters. - MM 11:52 AM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- Ok, thanks Mike. I'll be sure to check out the newer branches. I was able to get fpga_ctrl to load using the uimage from the MDK folder.
I had a few more questions about getting the screen to work.
I can't seem to be able to get th... - MW 07:23 AM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- Hi Matt,
There are several branches on our git server. The "master" is somewhat older, which is your 2.6.34-rc1. The newer MDKs use different branches. Most use the mitydsp-linux-v3.2 branch. You can check that version of the kern... - MW 02:00 PM PCB Development: RE: Usage of GP0 pins on MityDSP-L138F (Posted on behalf of a Customer)
- The "datasheet":http://www.mitydsp.com/images/upload/File/MityDSP-L138F%20Spec.pdf for the MityDSP-L138F contains this information. Perhaps it is not clear?
Table 1 in the datasheet lists for Pin-Out for the SOM. For the pins labell... - My programmers need to know:
What (if anything) is connected to the GPIO pins on port GP0 onboard the MityDSP-L138F board.
What we want to hear is that the CPU GPIO pins are wired only to the pins of the 200-pin SODIMM connecter, and...
09/10/2012
- MM 10:05 AM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- Hi Mike,
If I understand what I am doing correctly, I am using version 2.6.34-rc1 and I got the kernal from git://support.criticallink.com/home/git/linux-davinci.git.
Thanks,
Matt
09/07/2012
- MW 06:40 PM Software Development: RE: Requirements to install the fpga_ctrl.ko?
- Hi Matt,
The error messages you are getting are from the kernel module files not being compiled against the same version of the kernel. Newer filesystems have udpated kernel module files (the ones on the wiki are admittedly pretty ol... - Hi,
I've been working with our MityDSP L138F and devolopment board for a few days, today I tried to follow the insturctions to configure the LCD (http://support.criticallink.com/redmine/projects/arm9-platforms/wiki/LCD_configuration)
... - SW 09:49 AM Software Development: RE: kernel build
- duh, I guess it helps to execute the instructions you guys post. After tftp'ing the new kernel I would just type boot at the prompt and then boot up the kernel in flash. I was able to get the new kernel to boot this morning. sorry abo...
09/06/2012
- TC 05:59 PM Software Development: RE: kernel build
- Scott may have found the issue ... he is going to verify and re-post ...
- Hello, I am trying to build the kernel to support EXT4 filesystems. I have downloaded the latest configuration MDK_2012-08-10. I run the menu config with the default config file. The menuconfig displays Linux/arm 3.2.0 Kernel configur...
09/05/2012
- MW 03:03 PM Software Development: RE: L138 SD Card Boot & AISgen
- I don't have a bunch of time to wander off on this, but you might check the the DEVICE_INIT() routine of the $MDK/sw/3rdparty/OMAP-L138_FlashAndBootUtils_2_27/OMAP-L138/Common/src/device.c file. This has the PLL and DDR initialization c...
- RM 02:44 PM Software Development: RE: L138 SD Card Boot & AISgen
- Hi Mike,
Thanks for getting back to me so quickly.
We are indeed using a non-FPGA SOM. We have DIP switches on our baseboard to let us set the Boot[4..1] pins and changing these certainly changes the boot behaviour. Pull-ups are 1k... - MW 01:15 PM Software Development: RE: L138 SD Card Boot & AISgen
- Hi Richard,
Can you confirm you using a SOM without an FPGA?
FPGA based SOMs do not expose the bootmode / bootconfig pins necessary to boot directly out of SD. Those modules only support booting from SPI NOR or from UART via the... - Hi,
We're trying to create an SD card that contains both u-boot and our Linux kernel for an L138 module. We've now got our own baseboard, but it is very similar to the IndustrialIO board.
I've read the TI wiki pages on SD boot (htt...
09/04/2012
- EB 04:32 PM FPGA Development: RE: Voltage of bank 3 on MityARM 1810F
- Thanks for the quick reply!
- MW 04:16 PM FPGA Development: RE: Voltage of bank 3 on MityARM 1810F
- No that is a typo in the UCF file. The voltage is really 1.8V.
Those lines in the UCF should be as shown below. I thought we had corrected that in the BSP packages, looks like the errors are still there. Sorry Emmett. - EB 03:58 PM FPGA Development: RE: Voltage of bank 3 on MityARM 1810F
- Are these lines truly connect to the AM1808 as implied in the UCF?
- I started my FPGA code using fpga/vhdl/MityDSP_L138.ucf
I want to add to the design io_gp8(15 downto 8).
These lines are commented out in MityDSP_L138.ucf but the IO is 1.8V.
NET "io_gp8<15>" LOC = "T1" | IOSTANDARD = LVCMOS18;
1....
08/31/2012
- JP 09:58 AM Software Development: RE: Debugging DSP in VirtualBox?
- The Spectrum Digital XDS510 USB emulator pod does not seem to be useable from within the current Oracle VirtualBox.
08/30/2012
I followed the procedures of "Installing Open Embedded Core", no problem from step 1 to 4, but at step 5, there's no ~/.oe/environment-oecore file, how to create the file?
I flashed Angstrom v2012.05 - Kernel 3.2.0 to my mitydspL138...
08/28/2012
- CO 07:08 AM PCB Development: RE: MMCSD
- Sorry, I meant GPIO_0[6 or 7 or 13 or 15] as they are on the J700 connector along with MMCSD0...
- CO 04:16 AM PCB Development: RE: MMCSD
- Ah yes, that makes sense - I forgot about the degree of pin muxing going on in the L138 and the UPP would make sense there. My design is based around the WL1271 as well actually, although I've no reason to suppose a TXB0108 wouldn't do t...
08/27/2012
- MW 07:06 PM PCB Development: RE: Used EMIFA-Signals/Pins
- Yes, there should be several.
The only interface on the EMA on the modules with non-FPGA pins is the NAND (x8, but the upper 8 bit lines should probably be left alone). The NAND interface uses the following signals:
EMA_D(15..0)
... - CR 06:48 PM PCB Development: RE: Used EMIFA-Signals/Pins
- This is the mainquestion: Are there some not used Pins of the EMA interface which i can use as GPIO and keep the onboard memory working at the same time?
I need the GPIOs on the EMA-Pins, because i wanna connect some devices to the dev-... - MW 11:13 AM Software Development: RE: Vision Development Kit - What toolchain?
- Any of the ARM side GCC toolchains released should work with the VDK. I would recommend using the most recent one distributed.
The DSP side, I believe, was compiled with CGT 6.1.19, but any version 7.0 chain should work.
-Mike
- MW 10:28 AM PCB Development: RE: MMCSD
- Hello Conor,
Some background: the MMCSD1 was routed through the FPGA because it is pin-muxed with the UPP channel 0, which gets used quite a bit by our customers to push acquisition data from the FPGA into the OMAP-L138 processor. Ou... - Hi all,
I was looking at interfacing a wireless module to the MMCSD ports on the MityDSP L138F module. There are two ports available - one out to the dev board and one to the FPGA. The dev board is 3.3V LVCMOS but the module I have in...
08/23/2012
- CR 04:12 PM PCB Development: RE: Used EMIFA-Signals/Pins
- The one without the FPGA.
- MW 12:42 PM PCB Development: RE: Used EMIFA-Signals/Pins
- For which module? One that includes an FPGA or not?
- Hi,
which EMA-Pins of the EMIFA-Interface already connected to the L138-onboard-peripherials?
I couldn't found any detaild informations about.
Thanks,
Christian - WC 09:05 AM PCB Development: RE: MityDSP-L138F Mounting Holes (Posted on behalf of a customer)
- Mike, thanks for the quick response.
A STEP model is currently available at [http://support.criticallink.com/redmine/attachments/1293/MityDSP-L138F.step] unless you're referring to a newer version.
The keep-out area shown in the d... - MW 08:36 AM PCB Development: RE: MityDSP-L138F Mounting Holes (Posted on behalf of a customer)
- We may have a STEP model of the module, let me see if I can get that published.
- MW 08:35 AM PCB Development: RE: MityDSP-L138F Mounting Holes (Posted on behalf of a customer)
- Short answer is yes, 1.6mm maximum height. And you should probably hold to that height for the entire area below SOM as per the design guide, as there are a couple of small IC's outside the area in the drawing that was posted and there ...
- WC 08:11 AM PCB Development: RE: MityDSP-L138F Mounting Holes (Posted on behalf of a customer)
- The drawing you provided highlights a keep-out area for high profile components. What is the maximum component height allowed in this area? Is it 1.60 mm as specified in Figure 2 of the carrier board design guide?
Thanks.
08/22/2012
- Can JTAG debugging be performed from within CCS running in a VirtualBox?
- What GCC toolchain is used to build the VDK Linux application? DSP?