Activity
From 06/21/2014 to 07/20/2014
07/20/2014
- Hi,
I originally wanted to connect to the board either usb storage peripherals or webcams-like peripherals. I bou...
07/17/2014
- 05:08 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Pre production (-X) modules with newer sd image
- That update to the conf/local.conf should fix the uImage issue. As for the building of the DTB through yocto, we push...
- 03:42 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Pre production (-X) modules with newer sd image
- Thanks a lot for the feedback.
I have noticed that the Yocto wiki has just been updated concerning the uimage format... - 09:13 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Pre production (-X) modules with newer sd image
- I am currently working through the kit and having a similar experience. The following seems to work for me in regard ...
07/15/2014
- 06:28 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Pre production (-X) modules with newer sd image
- Well, the orange LED switches OFF because with this new version of the SD card, the FPGA is loaded with a firmware at...
- 04:39 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: How to enable PRU Subsystem on MityDSP-L138F SOM ???
- Hi Jonathan,
Thank you for your patches, it's working for me!
I have applied and successfully rebuilt my kernel.
...
07/14/2014
- 11:39 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: How to enable PRU Subsystem on MityDSP-L138F SOM ???
- Ngoc,
Can you confirm that this is working for you and i'll move the changes into our main kernel branch?
I als... - 10:51 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: How to enable PRU Subsystem on MityDSP-L138F SOM ???
- gpioToggle test passed when i just ran it. Not sure why....
- 10:24 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: How to enable PRU Subsystem on MityDSP-L138F SOM ???
- Reran some of the commands to see which fail. The ./PRU_memAccessL3andDDR can cause system segfaults as it appears t...
- 09:11 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: How to enable PRU Subsystem on MityDSP-L138F SOM ???
- Running through all the examples, atleast one of them seems to have caused a system segfault as not even reboot was a...
- 09:09 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: How to enable PRU Subsystem on MityDSP-L138F SOM ???
- Hi Ngoc,
I have been working on getting this to work. So far i've integrated the patches which i've posted to a t... - 04:45 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: How to enable PRU Subsystem on MityDSP-L138F SOM ???
- Hi,
Thank you, I'm waiting for your patches. ^^
Regards,
Manh BT - 09:43 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: SPI clock issues with using newest u-boot
- Yeah by using the ti_ 335x include files I was hoping to greatly simplify our config file. Hopefully it hasn't cause...
- 09:31 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: SPI clock issues with using newest u-boot
- Ok,
I knew it had to be in there somewhere, was just a bit confused
as the original mityarm335x.h had a nice ... - 09:26 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: SPI clock issues with using newest u-boot
- Pretty sure I found "#define CONFIG_SPI" in one of the ti_ config files that get included.
- 09:25 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: SPI clock issues with using newest u-boot
- Yes the Micron N25Q00AA does support the 48Mhz clock. The sf erase still seems longer
but I'll need to time it get ... - 09:25 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uBoot and USB using L138F SoM
- I have been looking into this. It seems that it was a mistake as the added resistor isn't mentioned in our Engineeri...
- 03:28 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uBoot and USB using L138F SoM
- OK, the cable that I used was a miniAB to USB A plug which was then attached to a USB A to USB A gender changer (a li...
07/13/2014
- 10:18 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: How to enable PRU Subsystem on MityDSP-L138F SOM ???
- Hello Manh BT,
The patches Mike described are in the mainline Linux kernel (http://kernel.org/). You can search fo... - 09:42 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: How to enable PRU Subsystem on MityDSP-L138F SOM ???
- Hi Michael,
Thanks for your information, but where can I get above patches? Is it in Critical Link MDK ?
Regard...
07/11/2014
- 05:26 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: SPI clock issues with using newest u-boot
- Also make sure your Nor chip supports 48Mhz on the spi bus.
- 05:25 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: SPI clock issues with using newest u-boot
- Did you notice any time difference with the slower speed?
- 03:30 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: SPI clock issues with using newest u-boot
- I took out the CONFIG_SPI_FLASH_BAR define and it now seem to pass the long erase command.
-----------------------... - 02:23 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: SPI clock issues with using newest u-boot
- It may be perfectly fine with the generic name then.
Try changing the spi clock speed and see if you get different... - 02:19 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: SPI clock issues with using newest u-boot
- I added the CONFIG_SPI_FLASH_BAR define to mityarm335x.h and the warning is goes away on the "sf probe" command.
I a... - 01:38 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: SPI clock issues with using newest u-boot
- 1) I'm not sure why its detecting it differently. Maybe the newer u-boot has a more specific driver for this chip?
... - 12:44 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: SPI clock issues with using newest u-boot
- Hey Johnathan,
Testing out the new spi bus changes seem fine. I do have two quick questions:
1) The original... - 01:30 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uBoot and USB using L138F SoM
- As per the On-The-Go spec, the mini USB adapter is supposed to tie the USB_ID pin to GND to indicate it should be put...
- 12:36 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uBoot and USB using L138F SoM
- Yep, loading an image seems to be OK. Next week I'll try the whole image + rootfs and make sure that works too.
T... - 12:20 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uBoot and USB using L138F SoM
- OK, now I get it. There's no resistor on my board pulling the ID pin down to 0V. I've just put a link between pins ...
- 12:07 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uBoot and USB using L138F SoM
- The number is 80-000286RI-2
REV B
S/N 132556
Which bootloader are you using? I've been using my own compilation... - 12:05 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uBoot and USB using L138F SoM
- Whats the part number of your dev kit? Should be a 80- number.
- 12:03 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uBoot and USB using L138F SoM
- I just tested this by first plugging the flash drive into the full size usb port J102. With no luck. Then plugged d...
- 11:43 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uBoot and USB using L138F SoM
- I forgot to say that I know that the USB port works because, once in Linux I can mount the drive OK and read/write fi...
- Hi there,
I'm using the L138F SoM on a REV B Industrial I/O board and I am trying to boot from a USB drive. uBoot i... - 09:34 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Building u-Boot and Preloader
- I believe that the files in question need to be copied from software/spl_bsp/generated into u-boot-socfpga/board/cl/m...
- 08:31 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: How to enable PRU Subsystem on MityDSP-L138F SOM ???
- Hi,
I think we need to add the following patches (from linus tree) to the kernel to instantiate the PRUSS drivers ... - Hi everyone!
I'm using MityDSP-L138F SOM + IO Industrial Board and now trying to work with PRU subsystem of OMAP-L...
07/10/2014
- 05:10 PM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RE: Time drift
- The skipping bad block is not an error but more of an info. Blocks can be marked bad from factory and during use. T...
- 04:19 PM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RE: Time drift
- The clock is working now. Thank you.
But when we flash the nand, there is an error:
root@mityarm-335x:~# flash_... - 03:29 PM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RE: Time drift
- So if this is the problem I'm thinking of. It was discovered that when we changed to the 3.2 kernel we weren't setti...
- 03:26 PM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RE: Time drift
- Hey Jonathan,
Thanks again, we will definitely try this solution and let you know if it works. I would like to kno... - 03:00 PM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RE: Time drift
- I've attached the lastest uImage but yes you can build it if you would like. Instructions are here [[Linux_Kernel]]
... - 02:57 PM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RE: Time drift
- NAND read: device 0 offset 0x340000, size 0x500000
Skipping bad block 0x00780000
5242880 bytes read: OK
## Bootin... - 02:56 PM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RE: Time drift
- We used the pre-build kernel image that came with the board. The kernel that in the Virtual Machine/home/mitydsp/proj...
- 08:12 AM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RE: Time drift
- What version of the kernel came with your devkit? Could you post a boot log?
Particularly I want to know if your ... - 02:23 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Breaking changes on early MityARM
- Should have spotted that note but somehow managed to miss it!
Thanks,
Nigel. - 02:00 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Breaking changes on early MityARM
- Hello Nigel,
Sorry about that. The description of the hardware changes for the Dev Kit baseboard are here:
htt... - I have an early MityARM module and dev kit. On trying to implement the latest software versions I found that the Ethe...
- I am just revisiting the development kit after working on other projects and I am trying to locate the copy_files.sh ...
07/09/2014
- 05:12 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: SPI clock issues with using newest u-boot
- Just pushed a fix for this.
http://support.criticallink.com/gitweb/?p=u-boot-mityarm-335x.git;a=commit;h=82762ccda72... - 04:33 PM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RE: Time drift
- Here is our clock tree (in /sys/kernel/debug/clock/summary):
clock-name parent-name ... - 04:14 PM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RE: Time drift
- When we boot into Linux and use the "date" (system clock) and "hwclock" (RTC I assume) commands to set/ask for time, ...
- 08:02 AM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RE: Time drift
- Hi,
What do you mean by "hardware and software" clocks. Are you using the RTC or just the system clock? Can you ...
07/08/2014
- Hello,
We bought a MityARM335x dev kit months ago. We have noticed that the time on the board (both software and h... - Hi,
I'am just starting to discover the eval kit. The one I ordered from Mouser was a pre-prod (- X) version. I und...
07/07/2014
- Hi,
Do you have sample c/c++ program to read/write a memory inside Cyclone V FPGA through hps2fpga bridge interfac...
07/03/2014
- 05:14 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: How to access FPGA internal memory through AXI slave interface protocol
- Hi Bill,
Sorry for the confusion. The latest image updated the Baud Rate to 115.2kbps to be consistent with the r... - 05:05 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: How to access FPGA internal memory through AXI slave interface protocol
- Hi,
I downloaded the sd_image_mitysom_5csx_rev1B.zip, and extracted out the .bin file. Then I typed "sudo dd if=sd... - 02:45 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uPP delay between transmissions
- It was a cache invalidation issue. Calling BCACHE_wb() solved the problem.
I did find a small bug in the trasmit()... - 08:29 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uPP delay between transmissions
- My first thought on seeing this is that it is probably a cache issue. After you set the values in the buffer, the va...
- 11:16 AM MityDSP (TI TMS320C6xxx Based Products) Software Development: RE: Problem compling with the MDK, unresolved symbols
- I got a similar problem reported here.
https://support.criticallink.com/redmine/boards/8/topics/4002
Can someone he... - Dear all,
I have a problem with Code Composer 6 and my DSP/BIOS project (called "quadra").
I have a first file (c...
07/02/2014
- 09:27 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: How to access FPGA internal memory through AXI slave interface protocol
- Information on how to make an SD card based upon the current Development Kit SD card image (Rev 1B) can be found on t...
- 06:17 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: How to access FPGA internal memory through AXI slave interface protocol
- Mike,
I think you meant "memtool -32 0xFFD0501C=0x06" for brgmodrst register. The reset value of the register some... - 08:52 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: How to access FPGA internal memory through AXI slave interface protocol
- For reference on the reset register:
http://www.altera.com/literature/hb/cyclone-v/hps.html#reg_default_component/... - 08:51 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: How to access FPGA internal memory through AXI slave interface protocol
- Hi Bill,
It looks like you are using version 3.8 of the kernel. Version 3.8 does not have the FPGA bridge drivers... - 06:47 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uPP delay between transmissions
- We cannot get the uPP to work. For test we just use the FPGA to pass the uPP pins to FPGA output pin. The Enable pin ...
- 07:19 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uPP delay between transmissions
- Ah, yes, I am sorry I forgot about the EMIFA scheduling delays. You are correct.
If you are using the reference P... - 12:55 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uPP delay between transmissions
- We started with EMIFA. We got a delay of 11uSec between transfers as discussed in this post:
https://support.criti... - 11:49 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Linker error on DSP application with Code Composer 6
- Thanks a lot to everybody.
It was a simple linker problem.
Silvano - Hello everybody.
We see an unexpected behaviour during simple debugging operations.
/*
* main.c
*/
#incl...
07/01/2014
- 04:30 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Linker error on DSP application with Code Composer 6
- Note i found the generic c674x device under target: generic devices
!DSP_C674x.png! - 03:39 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Linker error on DSP application with Code Composer 6
- Silvano,
Have you followed our guide to building a Hello World application?
https://support.criticallink.com/re... - Dear all,
we are trying to build a simple application on DSP using Code Composer 6 plus DSP/BIOS.
In the followi... - 09:49 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: SPI clock issues with using newest u-boot
- U-Boot# sf probe 0:0
SF: Unsupported flash IDs: manuf ff, jedec ffff, ext_jedec ffff
Failed to initialize SPI flash... - 09:49 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: SPI clock issues with using newest u-boot
- Jonathan,
I checked with manufacturing and they do use the command in verification
of basic communication wit...
06/30/2014
- 05:06 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: SPI clock issues with using newest u-boot
- Following your lead and my hardware engineers suggestion we did a temporary check and set 0x44E00050
(CM_PER_SPI1_C... - 05:03 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: SPI clock issues with using newest u-boot
- Committed change.
http://support.criticallink.com/gitweb/?p=u-boot-mityarm-335x.git;a=commit;h=bc7833792442421a60e74... - 04:54 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: SPI clock issues with using newest u-boot
- I'm testing this change right now and am going to push a commit if it works.
- 04:48 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: SPI clock issues with using newest u-boot
- Thanks. Let me take a look and if it works.
- 04:45 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: SPI clock issues with using newest u-boot
- I think I found the problem. The memory address 0x481A0000 refers to McSPI1 and only spi0 is enabled in the u-boot.
... - 04:40 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: SPI clock issues with using newest u-boot
- We had originally set up to boot out of SPI NOR and on occasion do use that ability for
manufacturing testing. The ... - 04:16 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: SPI clock issues with using newest u-boot
- No since booting from the spi nor on our SoMs doesn't work and I wasn't aware of anyone using the nor, I didn't look ...
- 03:40 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: SPI clock issues with using newest u-boot
- Hey Jonathan,
Looking at your release without any of my mods, serial NOR was removed (no sf commands.) Was ther... - 04:18 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uPP delay between transmissions
- Have you tried just writing to the FPGA via EMIFA? That would be a 16 2-byte word transfer. Even with 10 wait state...
- 03:11 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uPP delay between transmissions
- Re-architecting our code is not really a vaiable solution. We have a feedback loop running in the DSP, that depends o...
06/28/2014
- 04:22 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uPP delay between transmissions
- Hello,
First of all, using such small packet size you may not be able to completely eliminate the delay between s...
06/27/2014
- 09:52 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: How to access FPGA internal memory through AXI slave interface protocol
- Hi Mike,
I attached 2 files as you indicated in your previous reply. One is boot.log and another one is foo.txt.
... - 07:56 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: How to access FPGA internal memory through AXI slave interface protocol
- If you can't see the enable file then the driver for the device isn't compiled in or the device tree blob doesn't ins...
- We are trying to use uPP to send data from the DSP to the FPGA. The problem is that there is a delay of about 8 micro...
- 08:26 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: SPI clock issues with using newest u-boot
- It's possible or even probable that name of the pound defines changed in this version. You can check the Readme to se...
- 04:41 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: SPI clock issues with using newest u-boot
- Hey Jonathan,
Do I only need the "#define CONFIG_SPI"? I've tried that along with (from the original mityarm35x... - 04:29 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: SPI clock issues with using newest u-boot
- It does look like SPI was not enabled in the new u-boot config. Checkout the differences in include/configs/mityarm3...
- After moving to the newest u-boot we are having issues running SPI bus. Accessing the McSPI registers (0x481A0000) ca...
06/26/2014
- 10:46 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: How to access FPGA internal memory through AXI slave interface protocol
- Thanks for your reply.
I am currently intend to use hps2fpga bridge only in my design. And I just copy the generat... - 08:12 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: How to access FPGA internal memory through AXI slave interface protocol
- Which AXI crossbar interface are you using? The hps2fpga bridge or the lightweight bridge? Did you make a new prelo...
- Hi,
Could you point to some examples for UART RS232 communication?
Thanks,
Jack - 11:22 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: SSD on MityDSP-L138F
- Hannes,
As mentioned in the errata, they do not recommend the "reset" approach because they cannot guarantee that ... - 08:25 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Where to download the document about Memory Map and Register Address of IO Board 80-000268RI-2C and OMAPL138F
- These are provided by TI. You can find them here: http://www.ti.com/product/OMAP-L138/technicaldocuments
You shoul... - 08:16 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Where to download the document about Memory Map and Register Address of IO Board 80-000268RI-2C and OMAPL138F
- The memory map of the OMAP-L138 can be found on TI's main "OMAP-L138 web page":http://www.ti.com/product/omap-l138 (s...
06/25/2014
- only some brief documents are found in wiki,
Where can I download the document about Memory Map and Register Address... - Hi,
I have implemented a logic and loaded into cyclone V FPGA. Before that, I did run simulation to access a memor... - 05:09 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: MityARM335x profile 1 - Model No: 3352-GX-X27-RC failing memory writes in u-boot
- Dirty gets appended to the version string for both u-boot and the kernel when you compile source code that has change...
- 05:05 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: MityARM335x profile 1 - Model No: 3352-GX-X27-RC failing memory writes in u-boot
- I pulled the AM335XPSP_04.06.00.08 tag and there were a lot of differences. I don't think it matters
that much as we... - 04:58 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: MityARM335x profile 1 - Model No: 3352-GX-X27-RC failing memory writes in u-boot
- Looks like both the 03 and 08 branches have the same 2011.09 date so harder to determine which branch of code you wer...
- 04:55 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: MityARM335x profile 1 - Model No: 3352-GX-X27-RC failing memory writes in u-boot
- You were likely using the code from the AM335XPSP_04.06.00.08 branch before and now should be using the u-boot-2013.1...
- 02:05 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: MityARM335x profile 1 - Model No: 3352-GX-X27-RC failing memory writes in u-boot
- Hey Jonathan,
Can you tell me if I were to pull a full u-boot "tree" from your "u-boot-mityarm-335x.git/tree", ... - 12:18 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: MityARM335x profile 1 - Model No: 3352-GX-X27-RC failing memory writes in u-boot
- Seems like when I used our NAND mlo/u-boot burn in scripts, I blasted over the old u-boot by erasing NAND from 0 to 0...
- 12:11 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: MityARM335x profile 1 - Model No: 3352-GX-X27-RC failing memory writes in u-boot
- Not sure what happened, but even placing the original MLO back it will not boot:
U-Boot SPL 21401-101.01.00.02-dir... - 12:02 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: MityARM335x profile 1 - Model No: 3352-GX-X27-RC failing memory writes in u-boot
- Booting from the mmc card now does not show that u-boot in NAND has any issues.
U-Boot# nand read 8d000000 80000 1... - 11:56 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: MityARM335x profile 1 - Model No: 3352-GX-X27-RC failing memory writes in u-boot
- Yes we decided to store everything in nand using the correct ecc so we disabled the nandecc command. So you do not n...
- 11:43 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: MityARM335x profile 1 - Model No: 3352-GX-X27-RC failing memory writes in u-boot
- Looks like we can't reach u-boot with the new MLO. We see the following and then it stops. If we plug in the
mmc, w... - 11:34 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: MityARM335x profile 1 - Model No: 3352-GX-X27-RC failing memory writes in u-boot
- Thanks Jonathan,
It seems the u-boot nandecc command has changed. We used to run the following script for
burn... - 11:17 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: MityARM335x profile 1 - Model No: 3352-GX-X27-RC failing memory writes in u-boot
- Okay. I created a FAQ about this issue incase anyone else runs into it.
https://support.criticallink.com/redmine/p... - 11:13 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: MityARM335x profile 1 - Model No: 3352-GX-X27-RC failing memory writes in u-boot
- Hey Jonathan,
Yes there is indeed an error. I'll try the newer MLO to see how that works.
Thanks,
John C... - 10:18 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: MityARM335x profile 1 - Model No: 3352-GX-X27-RC failing memory writes in u-boot
- If you confirm there are bit flips you can then flash just the UBL into the NAND and see if it boots fine. You'll se...
- 10:13 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: MityARM335x profile 1 - Model No: 3352-GX-X27-RC failing memory writes in u-boot
- Try doing to following. It should print out bitflips if it finds them....
- 09:53 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: MityARM335x profile 1 - Model No: 3352-GX-X27-RC failing memory writes in u-boot
- Hey Jonathan,
I don't have access to a booted Linux, only u-boot. I created a text script that runs the u-boot ... - 04:02 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: DSP to FPGA SPI Setup Question
- Hello,Mike
Thank you very much.
- 12:42 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: DSP to FPGA SPI Setup Question
- What is your target update rate? Continuous?
You might try first to rip out all of the overhead on the tcDspFpgaS... - 11:32 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: DSP to FPGA SPI Setup Question
- Hello,Mike
Thank you for your help.
I have attached two pic
----one is the SPI bits transfer rate(This is our des... - 10:47 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: DSP to FPGA SPI Setup Question
- Can you check with a scope at what the clock rate is on the SPI device, and the interword write delay? I just want t...
- 10:39 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: DSP to FPGA SPI Setup Question
- Update and followup question from the customer:
We have made the SPI work, but transmitting the word to word is sl... - 12:01 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Interrupting the ARM from the DSP
- Thanks. This does what I wanted.
On the DSP side:... - 09:11 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Interrupting the ARM from the DSP
- I think that you are confusing signals and interrupts a bit.
You need to write some kernel module code to register... - 08:26 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Interrupting the ARM from the DSP
- Yes, I am familiar with DSPLink and am using it. However, I have time requirement that DSPLink cannot meet. Polling ...
- 08:01 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: USB2.0 Host on MityDSP-L138F
- There you are. Note that i had to change the initialization in the code as noted above.
- 07:26 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: USB2.0 Host on MityDSP-L138F
- If you don't mind, could you post your config.gz file?
- 05:37 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: USB2.0 Host on MityDSP-L138F
- Hey again,
i tried changing it from DMA to PIO. Now, everything seems to work. Device is readable, writable and mo... - Hey folks,
I'm trying to use a SSD instead of a HDD on the L138F.
I found in the errata that the OMAP-L138 has... - 02:12 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: TPS65023 VDCDC2 and VDCDC3 constraints
- Jonathan, thank you, I will track your branch.
06/24/2014
- 05:41 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Interrupting the ARM from the DSP
- Hello Mary,
I'm not sure what the problem is in your specific example as we almost always use DSPLink to to commu... - I would like to have the DSP (running BIOS 5) interrupt the ARM (running Linux MDK_2012-08-10)
In the DSP Code:
... - 05:19 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: MityARM335x profile 1 - Model No: 3352-GX-X27-RC failing memory writes in u-boot
- That is what I'm suggesting. You can verify if this is the issue by running the 'nand dump' or 'nand read' command a...
- 05:07 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: MityARM335x profile 1 - Model No: 3352-GX-X27-RC failing memory writes in u-boot
- So let me try and clarify the issue. We have been running our u-boot for about 10 months with no issues. Are you sugg...
- 04:56 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: MityARM335x profile 1 - Model No: 3352-GX-X27-RC failing memory writes in u-boot
- Those ecc errors are coming from reading the environment from nand. If I remember correctly the older u-boot saved t...
- 04:49 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: MityARM335x profile 1 - Model No: 3352-GX-X27-RC failing memory writes in u-boot
- No nevermind, thats not correct. You do have a 256MB nand module. So the first u-boot should be correct.
- 04:47 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: MityARM335x profile 1 - Model No: 3352-GX-X27-RC failing memory writes in u-boot
- U-Boot mainline:
origin/u-boot-2013.10: d35e05656457c2d3715de8c3eb7c777375c160ae
u-boot config: mityarm335x_4kpag... - 04:46 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: MityARM335x profile 1 - Model No: 3352-GX-X27-RC failing memory writes in u-boot
- Woops hangon didn't notice that you had a 3352 module. They have a larger nand and require a special u-boot build.
- 04:40 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: MityARM335x profile 1 - Model No: 3352-GX-X27-RC failing memory writes in u-boot
- Hey Jonathan,
Something is very unhappy. Here is the boot:
CCCCCCCC
U-Boot SPL 2013.10-gd35e056 (Jun 03 2014 ... - 04:28 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: MityARM335x profile 1 - Model No: 3352-GX-X27-RC failing memory writes in u-boot
- There was a bug with the older u-boot where ecc was not enabled when the UBL loaded the u-boot image. This meant tha...
- 04:22 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: MityARM335x profile 1 - Model No: 3352-GX-X27-RC failing memory writes in u-boot
- Here is the boot sequence:
----------------------------------------------------------------
U-Boot# CCCCCCCC
U-Boo... - 04:14 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: MityARM335x profile 1 - Model No: 3352-GX-X27-RC failing memory writes in u-boot
- John,
What version of U-boot are you using? If you can include the full bootlog that would be helpful. - 03:59 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: MityARM335x profile 1 - Model No: 3352-GX-X27-RC failing memory writes in u-boot
- As added information, the mtest command works.
Commands that *do* work:
mtest 402fffe0 402ffffe A5A500FF
mtest 8... - We just received one of our units back from the field and it hangs running a "mw.b" command in the u-boot param scrip...
- 12:04 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: TPS65023 VDCDC2 and VDCDC3 constraints
- Andrey,
Not sure if its any help but I've pushed a work in progress 3.14 branch to our git. Its based off the main...
06/23/2014
- 10:25 AM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: MityDSP-L138 processor running hot
- All unused connections are no connects.
- 09:59 AM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: MityDSP-L138 processor running hot
- I have attached a plot showing the rise of the supply on the baseboard (channel 2) and the Mity card (channel 1). As ...
- 09:54 AM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: MityDSP-L138 processor running hot
- What are you doing with unused connections on the module?
- 09:52 AM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: MityDSP-L138 processor running hot
- It remains hot until the next power cycle. A reset cycle alone does not give an improvement.
- 09:15 AM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: MityDSP-L138 processor running hot
- On non-FPGA variants, DVDD3318_A, DVDD3318_B, and DVDD3318_C are all tied to 3.3V.
Does the issue only occur durin... - 09:07 AM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: MityDSP-L138 processor running hot
- All our I/O to the card is 3.3V. The OMAP processor has 3 configurable power groups which can be connected to 3.3V or...
- 07:56 AM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: MityDSP-L138 processor running hot
- Ok.
I suspect the issue may be related to I/O voltage levels (you have I/Os being driven or pulled to a value larg... - 07:51 AM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: MityDSP-L138 processor running hot
- We are using a baseboard developed for our application. I'm happy to share the schematic. Let me know how to get that...
- 07:06 AM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: MityDSP-L138 processor running hot
- Hi Ed,
Are you running on a DevKit or on a custom board? Would you be willing to share your schematic (privately ... - We are some way into the development of using the MityDSP-L138 platform. I recently noticed that about 50% of the tim...
06/21/2014
- 03:49 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: TPS65023 VDCDC2 and VDCDC3 constraints
- Jonathan, nothing special only setup kernel config (attached).
I use Yocto Project Daisy toolchain and kernel from g...
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