Activity
From 11/05/2012 to 12/04/2012
12/04/2012
- MW 11:29 AM Software Development: RE: Linux DaVinci Video Port Interface (VPIF)
- Hi Terrence,
Sorry for the confusion. The linux kernels 2.6.X tracked TI's Platform Support Package releases from their arago site, not the mainline. TI has the tendency to rewrite their git history on those PSP branches (as much of... - TL 09:55 AM Software Development: RE: Linux DaVinci Video Port Interface (VPIF)
- I am currently using MDK_2011-12-05 DaVinici Linux kernel to support VPIF on a OMAP-L138F SoM platform. I attempted to use the newer MDK, MDK_2012-08-10, and I noticed that the MDK_2012-08-10 DaVinici Linux kernel does not provide VPIF ...
- I need to setup a VPIF interface (ala V4L2) using a Mity OMAP-L138F SoM platform running DaVinci Linux to support, BT.656, 8-bit, 720x480, composite (CVBS) video output only.
I have attempted to make customizations to the Linux kernel... - MW 07:12 AM FPGA Development: RE: I2C issues on SLX45
- Hi Conor,
What are you using for drive strength on the FPGA? You might be able to lower the drive strength if there is capacitance on the lines, but yeah, I would try a lower pullup value.
I am wondering if the I2C driver is not h... - CO 05:50 AM FPGA Development: RE: I2C issues on SLX45
- Hi again. It looks like the fpga is doing the right thing but the rise times are just too slow. Er. I guess that's my fault - should I lower the resistor values somewhat? I've captured the scope outputs from the ARM i2c bus and the FPGA ...
12/03/2012
- CO 10:26 AM FPGA Development: RE: I2C issues on SLX45
- Oh and 5K pull ups are to 3.3V on pin J701.38. SDA/SCL read 3.3V, at least on power on they do...
- CO 10:14 AM FPGA Development: RE: I2C issues on SLX45
- Thanks Mike. Sure it was evident the generics shouldn't be there and if they are it won't synthesise so it's not much a problem. I see the frequency set and the TODO! - makes more sense in the driver I guess. 200KHz is fine actually - it...
- MW 07:14 AM FPGA Development: RE: I2C issues on SLX45
- Hello Conor,
For the I2C, you are correct, the generics in the TOP were a carry over from a previous port -- should have caught that. The core is consistent with the package file, and the clock rate is controlled via a software progr... - Just one or two questions on the I2C ngc module. The industrialio_top.vhd example code uses a generic map to set clock rates. This seems out of sync with the MityDSP_L138_pkg.vhd package file which has no such maps. So I left them out. I...
- MW 08:31 AM Software Development: RE: Using RAM as temporary storage
- The 128 MB of Memory is total system memory. Some of it is used for the kernel and application space, but typically not all of it.
We have had some kernel and application foot prints as small as 12 MB, which would leave a larger chun... - MC 04:23 AM FPGA Development: RE: Pinout on L138-FG-225-RC
- Thank you Mike!
Another question: I see that you provide Bank 0 and Bank 1 of the FPGA on the SO-DIMM socket.
Am I free to use, for example, a GPIO Core across the banks, so connecting, for instance, a GPIO pin on a Bank 0 pin and an...
12/02/2012
- MW 02:59 PM FPGA Development: RE: Pinout on L138-FG-225-RC
- Hi Michele,
There is no issue if you are using 6SLX16 FPGAs in any module configuration.
This only a problem with 6SLX45 modules, as the issue is with the wire bonding on the LX45 FPGA chips in the package used by the modules. Cri... - MC 02:53 PM FPGA Development: RE: Pinout on L138-FG-225-RC
- Hello Tom,
the issue is (or was) on the datasheet of the SOM MityDSP
http://www.mitydsp.com/images/upload/File/MityDSP-L138F%20Spec.pdf
at page 7 you say that :
" The Xilinx 6SLX45 FPGA does not bond I/O Buffers to balls E7,... - TC 02:24 PM FPGA Development: RE: Pinout on L138-FG-225-RC
- Michele -
Can I ask for a reminder of what that issue is or a pointer to a forum post? I'm unable to locate it at the moment.
Thanks,
Tom - Hello All,
to be sure about the pinout of the SOM L138-FG-225-RC using the FPGA 6SLX16 , I ask if you fixed the issue on the pins 154 through 164 and 170-172.
I read that this applies to 6SLX45, and I want to be sure before making a cu...
11/30/2012
- Posting on behalf of a customer:
Customer wants to store data to the SD card but believes they will be bursting more than the write speeds that we have tested for the SD card interface (http://support.criticallink.com/redmine/projects...
11/29/2012
- JB 05:34 PM FPGA Development: RE: Xilinx design suite 14.2 and MDK_2012-08-10
- I found the solution!:)
- We've been using an OMAP-L138F SOM that has exhibited no problems until we re-flashed the section containing FPGA binary that loads at boot time (which we've done successfully multiple times.) Ever since we've updated that section of the...
- SM 11:16 AM Software Development: RE: Cannot Toggle GPIO pin
- Thanks for your speedy reply. I'm using 3.2 from the 2012-08-10 MDK.
- MW 11:14 AM Software Development: RE: Cannot Toggle GPIO pin
- Hi Spencer,
The issue is that the MCASP (see baseboard-industrialio.c) setup is configuring that pin to be in AFSR mode.
I will submit a patch to the 3.2 kernel (which one are you using?) to fix this, but a quick work around if you... - SM 11:04 AM Software Development: RE: Cannot Toggle GPIO pin
- Some funky formatting happened with the gpio name. Just for clarification its GPIO 0_13.
- I'm running a MitydspL138 on the Industrial IO board, and I'm trying to set GPIO[0]_13 via echoing directions and values to /sys/class/gpio13/. When I build the kernel against the industrialio_defconfig, I can set the direction to in or...
- ML 09:39 AM Software Development: RE: Problems building a rootfile system
- Mike,
You are right - it was a config problem. By comparing the config you attached with the default "industial io config" I was able to pin point the problem. In the "industial IO config" from git repository the "Plaform AHCI SATA s...
11/28/2012
- MW 01:51 PM Software Development: RE: Problems building a rootfile system
- Thanks for the information.
We have at least one active customer using the 3.2 kernel on an Industrial-IO board with Seagate SATA-II drive ("here":http://www.seagate.com/internal-hard-drives/laptop-hard-drives/momentus-thin/?sku=ST320... - ML 05:30 AM Software Development: RE: Problems building a rootfile system
- Hi,
Mike, thanks for your clarification.
I have two sata disks, one SSD which is sata-II (3.0gb) and one old mechanical drive which is sata-I (1.5gb). What I experience is:
*kernel 2.6.34 from git/SSD drive:*
ata1: SATA link u...
11/27/2012
- Hi all,
I am beginner with FPGA programming and want to develop a simple project on my MityDSP-l138F, involving only the the minimal set of components to toggle free FPGA gpios on an external bus I am not planning to use other buses lik... - MW 10:39 AM Software Development: RE: Problems building a rootfile system
- Hello,
I'm fairly certain that TI submitted the ahci-ti.c stuff originally in their PSP into the mainline and it got shuffled around a bit. That code is primarily platform specific and the driver folks wanted it out of the driver are... - ML 09:38 AM Software Development: RE: Problems building a rootfile system
- Hi,
Just compared the drivers/ata for kernel version 2.6.34 and 3.2. It seems obvious that the 3.2 branch is lacking a lot... The ahci-ti.c file is not even present in the 3.2 branch. Is there another branch which has this issue fixed...
11/26/2012
- KV 05:17 PM Software Development: RE: helloworld dsplink example
- Do not get a chance to exit the application.
here is the log:
root@mityomapl138:/#
root@mityomapl138:/#
root@mityomapl138:/# ./HelloWorldARM HelloWorldDSP.out
Loading file HelloWorldDSP.out
Msgq <debug> open: 0x00008000
PROC... - PS 02:49 PM Software Development: Building openembedded-core from scratch : MityDSP overlay breaks meta-toolchain-qte
- Hi,
Is there a fix yet for the broken build system?
Would it not be possible to move the open parts to a public repository?
Thanks
Phil
11/25/2012
- KF 02:34 PM Software Development: RE: GPIO Interrupt: request_irq() returning error: EINVAL
- Hi Mike,
You were correct - I had failed to use the gpio_to_irq() function.
It all works sweet now!
Thanks for you help,
Keith.
11/24/2012
- MW 07:59 PM Software Development: RE: helloworld dsplink example
- Are you exiting the application by hitting 'q'?
-Mike
- in Helloworld dsp link example, get follwing aserts! why?
root@mityomapl138:/# ./HellWorldARM HellWorldDSP.out
Loading file HellWorldDSP.out
Msgq <debug> open: 0x00008000
PROC Load successful
Starting application.
Msgq <GPPMSGQ1>... - MW 03:46 PM Software Development: RE: dsplinkk.ko compatibility
- There should be a dsplinkk.ko file in the /lib/modules/3.2.0/ directory in the reference filesystems. See http://support.criticallink.com/redmine/boards/10/topics/2068?r=2073#message-2073
There is a blurb about rebuilding the module ...
11/23/2012
- The MityDSP board has installed Linux kernel v 3.2.0. This was required for compatibilty with g_ether.ko driver for ethernet over usb gadget.
However the dsplinkk.ko driver from MDK_2012-08-10/sw/3rdparty/dsplink_linux_1_65_00_03/dspl...
11/22/2012
- MW 09:02 AM Software Development: RE: Problems building a rootfile system
- Hello,
We've actually seen this issue on both kernels, and in general have traced the issue back to an Errata on the OMAP-L138/AM-1808 SATA controller - there is an issue with the link negotiation with SATA-III based drives that cause... - ML 03:35 AM Software Development: RE: Problems building a rootfile system
- Hello,
I have decided to use the Yocto framework for building my rootfs. Together with the 3.2 kernel compiled from the critical link git repository, I am able to to bring up all the resources that I need except for one - the sata int... - MW 08:43 AM Software Development: RE: GPIO Interrupt: request_irq() returning error: EINVAL
- I am assuming you are writing kernel code or a kernel module?
Can you send a snippet of the code?
The GPIO interrupt routing is a little different that normal peripherals. The "real" IRQ for the GPIOS (one per bank or perhaps some...
11/20/2012
- Hi,
I have attempted to configure a digital io, from bank0, as an interrupt, using the AINTC. However, when I attempt to assign an ISR to the interrupt (No 42) using request_irq() it returns EIVAL.
I have configured the GPIO, the AI... - MW 05:57 PM Software Development: RE: Quick check of TLK100 ethernet PHY with U-boot
- Hi Emmett,
Can you do a "config" command on both modules and confirm that the "EMAC configuration":http://support.criticallink.com/redmine/projects/arm9-platforms/wiki/Network_configuration is the same? If the network interface is no... - EB 04:54 PM Software Development: RE: Quick check of TLK100 ethernet PHY with U-boot
- We have 2 AM1808F SOM boards.
We realized that with the newer one, U-Boot does detect the TLK100PHP PHY.
The older one, the fab PCB is marked Rev A, U-Boot does NOT detect the TLK100PHP PHY.
- MW 05:52 PM Software Development: RE: Mity DSP-L138 Development board - 3 UARTS needed for final design?
- I am assuming you are not using a MityDSP-L138F (with FPGA), right? If you do, I would simply put a UART into the FPGA...
If you are using a non-FPGA module, then you'll need to modify the PCB. It won't be trivial. There are schemat...
11/19/2012
- MW 11:05 AM Software Development: RE: Power management in Linux on MityDSP-l138F
- Hello,
We have been able to put the L-138 into DEEPSLEEP mode (using the RTC to wake up the device). This was tested in the 2.6.34 kernel during initial linux testing, however in that mode the external mDDR was kept in internal refre...
11/16/2012
- I would like to verify communication with the TLK100PHP ethernet PHY using U-boot.
I have the identical circuit on my board, but I'll start with your base board, since I know it works with linux.
Upon U-boot startup it report "No Eth... - Hi all,
I would like to know whether there has been any effort to put the L-138 in DEEPSLEEP.
In that case I would like to know what is the power consumption of the board,
(assuming that the FPGA is not running)
Thanks in advance fo...
11/15/2012
- We are currently using your Mity DSP-L138 development board for software development until our own mother board is ready.
Our final design requires 3 UARTS - obviously UART1 and 2 are readily available on your board - but is there an...
11/13/2012
- KV 08:09 PM Software Development: RE: Ethernet over usb
- Need help with the Linux kernel:
Generated the usb gadget, but cannot install it.
mitydsp@mitydsp-dev:~/workspace/craigs-lib$ uname -r
2.6.32-45-generic
make oldconfig
Make newconfig generated usb gadget for ethernet.
sud...
11/09/2012
- TI 01:57 PM Software Development: RE: How to change the pinmux
- Spencer
u-boot does the initial pinmux setup, look in board/davinci/mityomapl138/mityomapl138.c
The kernel then sets its own pinmux settings, see arch/arm/mach-davinci/baseboard-industrialio.c for the industiral I/O board.
For the ... - I am working with a MityDSP L138 on a custom baseboard, and am having trouble figuring out how to modify the pinmux settings. The board I am using re-purposes a lot of the I/O lines for different uses than on the industrial IO board, bu...
- MF 01:50 PM Software Development: RE: Remote Debugging Hello DSP
- Almost there ... I still have an issue.
John Pruitt said:
The error code 0x80008050 indicates that the connection requested by the client already exists. This probably means the first DSP program is already running and isn't automati... - MF 10:32 AM Software Development: RE: Remote Debugging Hello DSP
- Yes, I can run from the command line twice.
One problem: I needed to put the full path name for the DSP executable file. This fixed the DSP_EFILE error.
The other turns out to be a timing issue. I can't single step through the ini...
11/08/2012
- KV 08:28 PM Software Development: RE: Ethernet over usb
- Succussfully generated and installed g_ether.ko on the mitydsp board, and configured the usb0 withe an ip adrees. Thanks.
Attempted to do the sam thing on the host. It is missing the driver.
mitydsp@mitydsp-dev:/lib/modules/2.6.32-... - MW 01:35 PM Software Development: RE: Ethernet over usb
- The only way to get an invalid module format is if the kernel and modules aren't build from the same source / configuration / tree.
You might be explicit with your module load, e.g. - MF 01:45 PM Software Development: RE: How to build cmemk.ko
- Thanks!
I found the cmemk.ko module in the the /lib/modules/3.2.0/extra/ folder along with dsplinkk.ko and others. Used insmod for both and ran my application which ran some CMEM calls. - MW 12:50 PM Software Development: RE: How to build cmemk.ko
- The base and full filesystems in the MDK_2012-08-10 (MD_2012-08-10/fs/*.tgz) each have a cmemk.ko module located in the /lib/modules/3.2.0/extra/ folder. These should be modprobe-able if are you using the uImage that comes with the file...
- I need to use the CMEM utility, but there is no cmemk.ko file. I am trying to build it, but can't find any instructions for that.
I ran make from this directory: ~/MDK_2012-08-10/sw/3rdparty/linuxutils_2_26_01_02/packages/ti/sdo/linu... - MW 01:23 PM Software Development: RE: CLK frequency increase using DSP only
- OK.
The u-Boot / I2C commands to push the core voltage up to 1.3 volts, required for running at 456 MHz are as follows:
i2c mw 0x48 0x06.1 0x14 ## set DEFCORE to 1.3 volts
i2c mw 0x48 0x05.1 0xC0 ## enable transition to new ... - MW 12:55 PM Software Development: RE: Problems building a rootfile system
- Hi Mads,
We are actually considering moving all of our SOM linux capable products to Yocto (which is pretty close given we already have a chunk of the meta-mitydsp layers complete). Are the failures you are dealing with a result of t... - I would like to build my own rootfile system for the mityarm 1808 dev kit. So far I have only succeeded with builds from the online Angstom builder. All efforts of using open embedded as described in the wiki and the Angstrom description...
11/07/2012
- AH 05:09 PM Software Development: RE: CLK frequency increase using DSP only
- Great - thanks Mike. In addition to increasing the voltage, I'd also be most grateful for a list of (DSP or u-Boot) commands that actually increase the frequency to 456 MHz, if you have them.
Thanks,
Roger - MW 04:29 PM Software Development: RE: CLK frequency increase using DSP only
- Hello,
Some quick answers, though I must admit we don't normally abandon the ARM here in our applications, so you are on someone new ground....
1) I think this approach should work and would be the quickest / easiest to get you goi... - Hi,
I'm using a MityDSP-L138F board (L138-FI-225-RC). I'm porting an existing C6748-based DSP project, that gets in data through a high-speed interface (which I'm planning to use the FPGA and uPP interface for), and communicates with ...
11/05/2012
- MW 08:05 AM Software Development: RE: Using of SPI1 interface on DSP-Side?
- The SPI1 (chip select 0) is used to communicate with the on-module SPI-NOR FLASH on MityDSP-L138/MityARM-1808 modules. It is used during boot, but in general not used after loading up a kernel and/or your application (in the case of sta...
- Hi,
My plan is to connect a DAC on the SPI1 which is outrouted to the edgeconnector and control it by the DSP core but now i have seen, that the onboard NOR-Flash must be also conntcted to the sampe SPI1-Interface. Is it?
When th...