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From 06/25/2013 to 07/24/2013

07/24/2013

06:13 PM Software Development: RE: UPP "start" signal ignored in receive mode?
Hi Stu,
Have you tried to use chipscope to confirm the alignment of the start strobe with the data as sent by the ...
Michael Williamson
12:53 PM Software Development: RE: UPP "start" signal ignored in receive mode?
Scott,
Yes, we're trying to send one line (of 6176 bytes) per DMA memory buffer (also 6176 bytes). The "DspUpp.c"...
Stewart Cobb

07/23/2013

05:52 PM Software Development: RE: UPP "start" signal ignored in receive mode?
Hi Stu,
Check section 33.2.5.3 of the TRM. For receive mode, the start line is optional, controlled by the STARTx...
Michael Williamson
04:56 PM Software Development: RE: UPP "start" signal ignored in receive mode?
Stu,
I'm not sure about the DSP driver for uPP, I am using a Linux driver to the Arm. Are you trying to stream data...
Scott Whitney

07/22/2013

03:52 PM FPGA Development: RE: EMA_WAIT and bus contention on L138F
Hi Mike, relevant definitions from the header:... Mostafa Afgani
02:11 PM FPGA Development: RE: EMA_WAIT and bus contention on L138F
Just for sanity,
Have you confirmed you are writing to the correct AEMIF registers? CE3 is the NAND, and you are ...
Michael Williamson
01:42 PM FPGA Development: RE: EMA_WAIT and bus contention on L138F
Hi Mike,
I've now also tried setting unused I/O to float and increasing both the TA and Read Hold to 4 cycles. I'v...
Mostafa Afgani
03:22 AM Software Development: UPP "start" signal ignored in receive mode?
We have an FPGA application for the MityDSP-138F board which transmits "packets" to the DSP through the UPP port. Th... Stewart Cobb
01:25 AM Software Development: RE: Fail to mount Root FS from MicroSD card
Ok, managed to fix the problem.
I have changed mityomapl138_mmc_get_ro() in board-mityomapl138.c to return(0) since ...
Dmitry Gorulko

07/21/2013

10:19 PM Software Development: RE: Fail to mount Root FS from MicroSD card
Hello, Tim!
Comma makes no difference, I have tried.
I have got a little progress - I have changed bootargs as ...
Dmitry Gorulko
07:27 AM Software Development: RE: Fail to mount Root FS from MicroSD card
Dmitry,
I believe yhou are missing a comma in your bootargs..
root=/dev/mmcblk0p1 rw rootwait
should be
root=/dev...
Tim Iskander
04:40 AM Software Development: Fail to mount Root FS from MicroSD card
Hello!
I am trying to mount Root FS from MicroSD card (ext2 formated).
Boot process fails with kernel panic.
My ...
Dmitry Gorulko

07/18/2013

06:50 PM Software Development: RE: RS-485 problems
Solved the problem myself - it turns out that either SER_RS485_RTS_ON_SEND or SER_RS485_RTS_AFTER_SEND must be define... Steven Hill
05:54 PM Software Development: RE: RS-485 problems
OK, then it all makes sense. In spite of the way the connector is shown in the documentation I was assuming (never a... Steven Hill
05:20 PM Software Development: RE: RS-485 problems
Actually, I take that back. The pin out is illustrated in Figure 2 of the specification....
-Mike
Michael Williamson
05:13 PM Software Development: RE: RS-485 problems
Ah,
I think I may see the problem. Those connectors are pinned (on our PCB) for use with a ribbon cable and a DB-...
Michael Williamson
05:08 PM Software Development: RE: RS-485 problems
My board is 80-000268RI-2B, S/N 132541. I looked at the appropriate document on the page you referenced, and while i... Steven Hill
04:59 PM Software Development: RE: RS-485 problems
Hi Steven,
Let's make sure you are referencing the correct revision information for the board (it has been updated...
Michael Williamson
04:07 PM Software Development: RE: RS-485 problems

I am looking at pins on J504, based on the Industrial IO Board rev C documentation
Curiously, only pins 1,2,3,4,...
Steven Hill
03:27 PM Software Development: RE: RS-485 problems
OK, here is what I see:
mitydsp@mitydsp-VirtualBox:~/linux-davinci$ git branch
master
* mitydsp-linux-v3.2
mi...
Steven Hill
03:24 PM Software Development: RE: RS-485 problems
I am assuming it compiled OK.
Are you sure that the write() call is returning successfully? Can you send the full...
Michael Williamson
03:22 PM Software Development: RE: RS-485 problems
Btw press q to escape @git log@. Jonathan Cormier
03:21 PM Software Development: RE: RS-485 problems
Steven,
Run the command @git branch@ to see which branch is selected. It should say mitydsp-linux-v3.2. When you...
Jonathan Cormier
03:18 PM Software Development: RE: RS-485 problems
OK, I built the new kernel and flashed it to the MityDSP - now uname gives:
Linux mityomapl138 3.2.0+ #1 PREEMPT T...
Steven Hill
02:43 PM Software Development: RE: RS-485 problems
Sorry - my mistake. I re-installed the toolchain and then realized that I had typed "CROSS-COMPILE" instead of "CROS... Steven Hill
02:06 PM Software Development: RE: RS-485 problems
I seem to have the same problems - here is the output from a new shell:... Steven Hill
01:52 PM Software Development: RE: RS-485 problems
You only use the HOST native CC, not the cross tools, to build the config file. It seems like you have a CC environm... Michael Williamson
01:41 PM Software Development: RE: RS-485 problems
I'm getting errors when I try to build the kernel:
mitydsp@mitydsp-VirtualBox:~/linux-davinci$ make ARCH=arm CROSS...
Steven Hill
11:26 AM Software Development: RE: RS-485 problems
If you have our repository cloned already....... Michael Williamson
11:14 AM Software Development: RE: RS-485 problems
A newbie question - How do I build this particular branch of the kernel? Steven Hill
10:34 AM Software Development: RE: RS-485 problems
Thanks for your response. Here is what I get from uname:
Linux mityomapl138 3.2.0 #1 PREEMPT Wed May 15 09:16:03 ED...
Steven Hill
12:30 PM FPGA Development: RE: EMA_WAIT and bus contention on L138F
One thought:
Is it possible the tri-state drive logic for the data lines off the FPGA is creating bus contention? ...
Michael Williamson
12:24 PM FPGA Development: RE: EMA_WAIT and bus contention on L138F
Hi Mike,
Thanks for the suggestions.
Not sure I understand what you mean by FPGA access bandwidth. It is being ...
Mostafa Afgani

07/17/2013

09:17 PM Software Development: RE: RS-485 problems
OK. I have added the patch to the mitydsp-linux-v3.2 branch. You should be able to at least see the Tx line toggle ... Michael Williamson
08:55 PM Software Development: RE: RS-485 problems
Hi Steven,
Sorry for the confusion. It's not a menuconfig item. There is a patch needed to enable the UART2 pin...
Michael Williamson
08:32 PM Software Development: RE: RS-485 problems
How would anyone know this? I have looked at the config of the kernel I am using and you are correct, these pins are... Steven Hill
07:05 PM Software Development: RE: RS-485 problems
Hello,
Is is possible your kernel may not be setting up the ARM pin multiplexing for UART2? In your baseboard file...
Dominic Giambo
06:48 PM Software Development: RE: RS-485 problems
I have attached the files defining the class and showing how I open the serial port. Then I just use standard write c... Steven Hill
05:07 PM Software Development: RS-485 problems
I am trying to get the RS-485 running on my Industrial I/O board with the L-138F. I'm using the example code in "sen... Steven Hill
07:38 AM FPGA Development: RE: EMA_WAIT and bus contention on L138F
Hello,
How much bandwidth are you using for the FPGA accesses? Have you looked with any sort of bus analyzer (per...
Michael Williamson

07/16/2013

12:07 PM FPGA Development: EMA_WAIT and bus contention on L138F
We have a project which uses CS4 and CS5 to write and read data from a pair of FPGA FIFOs respectively. CS4 is used e... Mostafa Afgani

07/15/2013

05:23 PM Software Development: RE: Simple example needed
Thanks for the help. I decided to take a very simple approach and use mmap to access the FPGA, based on the mmap exa... Steven Hill

07/14/2013

08:22 AM Software Development: RE: Simple example needed
Answers to questions:
1. The reserved FPGA id's are in the file: $MDK/sw/common/fpga/core_ids.h. I would use core...
Michael Williamson

07/12/2013

02:02 AM Software Development: RE: flash and boot utils
Hi Mike,
I finally took the newest flash loader sources from TI (v2.40) and followed the wiki instructions (http:/...
Stéphane Peter
01:58 AM Software Development: RE: shared memory in the DSP Helloworld example
Thanks mike. That cleared my doubts. Vinod Ganesh

07/11/2013

09:50 AM Software Development: RE: Simple example needed
I just thought of another question. Not being familiar with linux, I am wondering what abstraction I might be able t... Steven Hill
09:33 AM Software Development: RE: Simple example needed
OK, I am probably going to have a lot of questions. To start with:
1. What IDs are available to use for my core?
2....
Steven Hill
07:44 AM Software Development: RE: Simple example needed
Hi Steven,
My understanding is that you have your own FPGA IP and want to control it (including catching an interr...
Michael Williamson
07:12 AM Software Development: RE: shared memory in the DSP Helloworld example
Hello Vinod,
The memory allocated is in the OMAP external DDR2 memory, and is actually in the DSPLINK POOL segment...
Michael Williamson
06:49 AM Software Development: shared memory in the DSP Helloworld example
hi,
Where does the memory allocated by GetBuffer() reside? Is it in the external RAM or OMAP's internal memory? Fo...
Vinod Ganesh

07/10/2013

07:16 AM Software Development: RE: flash and boot utils
Hi Mike,
We are using the serial flash tool to replace the preprogrammed U-Boot with an own SysBios based loader app...
Stéphane Peter
07:01 AM Software Development: RE: flash and boot utils
Hello,
Are you using the serial flash tool instead of u-Boot to program application images?
Are you rebuilding ...
Michael Williamson
03:28 AM Software Development: flash and boot utils
Hello,
I rebuilt the SPI serial flash tool (sfh_OMAP-L138.exe) from the MDK_2013_05_15 sources. Therefor I changed...
Stéphane Peter

07/09/2013

10:46 AM Software Development: RE: MItyDSP L138-FI-236-RL Industrial IO Board 80-000268RI-2 rev. B, wont reset and no output on serial port.
Hi,
I am using a nondescript USB to RS232 cable, dmesg tells me its a FTDI USB-RS232 cable, with a FT232RL onboard...
Christopher Brunson
09:55 AM Software Development: RE: MItyDSP L138-FI-236-RL Industrial IO Board 80-000268RI-2 rev. B, wont reset and no output on serial port.
Chris,
Glad to hear of your success... if you don't mind, can you detail your setup a bit. Are you using a USB seria...
Tim Iskander
09:50 AM Software Development: RE: MItyDSP L138-FI-236-RL Industrial IO Board 80-000268RI-2 rev. B, wont reset and no output on serial port.
Hi,
I finally got it working by directly connecting the serial port to the board.
Thanks for the help,
Chris.
Christopher Brunson
09:15 AM Software Development: RE: MItyDSP L138-FI-236-RL Industrial IO Board 80-000268RI-2 rev. B, wont reset and no output on serial port.
Hi,
Swapping up the cables sees to make no difference, and if I plug in my work PC into the supplied cross over ca...
Christopher Brunson

07/08/2013

09:09 AM Software Development: RE: MItyDSP L138-FI-236-RL Industrial IO Board 80-000268RI-2 rev. B, wont reset and no output on serial port.
Chris,
Have you tried to add another null modem adapter into the mix or a straight-thru cable just as a sanity che...
Jonathan Cormier
06:54 AM Software Development: RE: MItyDSP L138-FI-236-RL Industrial IO Board 80-000268RI-2 rev. B, wont reset and no output on serial port.
Hi Bob,
I have been trying with both screen and putty.
Both seem to work fine when I loopback the tx and rx lin...
Christopher Brunson

07/07/2013

09:47 PM Software Development: RE: MItyDSP L138-FI-236-RL Industrial IO Board 80-000268RI-2 rev. B, wont reset and no output on serial port.
Hello Christopher,
What terminal program are you using to connect to the serial port on your PC?
-Bob
Bob Duke

07/05/2013

11:42 AM Software Development: MItyDSP L138-FI-236-RL Industrial IO Board 80-000268RI-2 rev. B, wont reset and no output on serial port.
I am trying to load the hello world program.
So I set up the serial port on my pc with the following settings:
...
Christopher Brunson

07/02/2013

04:18 PM Software Development: RE: Simple example needed
Yes, I'm looking for an example similar to the Hello World ARM/DSP project... Steven Hill
03:32 PM Software Development: RE: Simple example needed
Is your ARM processor going to run linux?
Michael Williamson
01:22 PM Software Development: Simple example needed
I am using the MityDSP L-138F Industrial development board. I am not finding the examples for that board given in th... Steven Hill
10:51 AM FPGA Development: RE: Hardware Reset
On the MityDSP-L138F, RESET_IN pin is fed into a TPS3808G33DBVR reset monitor circuit. It is not connected to the FP... Michael Williamson
10:06 AM FPGA Development: RE: Hardware Reset
Hi Mike,
In effect yes. I was wondering if the device/circuit which drives the reset pin of the OMAP processor is ...
Craig Little

07/01/2013

07:49 PM FPGA Development: RE: Hardware Reset
When there is a power on reset, the FPGA will be re-initialized (the program pin is pulled low) and will require repr... Michael Williamson
10:48 AM FPGA Development: Hardware Reset
Hi There,
Is there a pin on the MityDSP-L138F processor board FPGA which is attached to a
dedicated power-on/har...
Craig Little

06/28/2013

01:19 PM Software Development: RE: mtd->read (...) returned ECC error
Hi Tim,
since today, the same problems as already mentioned are happening at the moment on my board.
Before I sta...
Christian Rückl

06/27/2013

04:56 AM Software Development: RE: Fail to boot the kernel after running setup.sh in DVSDK 4.03
Hi Mike & Jonathan,
Really appreciate your help!
The kit could load the kernel now.
-Derek
Derek Tan

06/26/2013

04:48 PM Software Development: RE: Fail to boot the kernel after running setup.sh in DVSDK 4.03
Derek,
Where you aware of this wiki page?
http://support.criticallink.com/redmine/projects/arm9-platforms/wiki/Dv...
Jonathan Cormier
07:26 AM Software Development: RE: Fail to boot the kernel after running setup.sh in DVSDK 4.03
Hi Derek,
The kernel that comes with the DVSDK (uImage-da850-omapl138-evm.bin) will not work with the MityDSP-L138...
Michael Williamson
02:19 PM FPGA Development: RE: Problem building IndustrialIO project build_lcd_rev_c
I found the solution to the problem. I had to remove the Xilinx device that was in the iMPACT window (left over from... Steven Hill
01:57 PM FPGA Development: RE: Problem building IndustrialIO project build_lcd_rev_c
OK clearly it's not finding the file (according to the log). Looks like you have spaces in your path to the bit file... Michael Williamson
01:54 PM FPGA Development: RE: Problem building IndustrialIO project build_lcd_rev_c
That does not seem to work. WHen I double click on "Generate File" I get a big red "Generate Failed" box. The word "b... Steven Hill
01:31 PM FPGA Development: RE: Problem building IndustrialIO project build_lcd_rev_c
Not having the tools up in front of me. I think you can put more than one bit file into a configuration PROM (to sup... Michael Williamson
01:22 PM FPGA Development: RE: Problem building IndustrialIO project build_lcd_rev_c
I built a simple project based on files for GPIO_Test from Conor O in the post "Xilinx design suite 14.2 and MDK_2012... Steven Hill
09:02 AM FPGA Development: RE: Problem building IndustrialIO project build_lcd_rev_c
Hi Steven,
The issue here is that entity description for the i2c component has changed since the Rev A and B boar...
Gregory Gluszek
07:29 AM PCB Development: RE: Expansion IO mating headers type
We use "Molex 87759-5050":http://www.mouser.com/ProductDetail/Molex/87759-5050/?qs=%2Fha2pyFadujxwC2WDHBby6OIFIiNwyQw... Michael Williamson
04:55 AM Software Development: RE: Data Transfer over DSPLink
Great!
This works :)
Thanks,
Christian
Christian Rückl

06/25/2013

09:30 PM Software Development: RE: Fail to boot the kernel after running setup.sh in DVSDK 4.03
Hi Jonathan,
Thank you for your reply:)
I'm using the Industrial IO Development Kit with MityDSP-L138F. No ch...
Derek Tan
10:02 AM Software Development: RE: Fail to boot the kernel after running setup.sh in DVSDK 4.03
Derek,
I'm unclear with what you changed between when it was last working and now.
-Jonathan
Jonathan Cormier
12:56 AM Software Development: RE: Fail to boot the kernel after running setup.sh in DVSDK 4.03
I have build the kernel with codes in git://support.criticallink.com/home/git/linux-davinci.git
No more output is ...
Derek Tan
04:02 PM FPGA Development: Problem building IndustrialIO project build_lcd_rev_c
Following on from a similar question in the forum "Creating FPGA Base-Project - core manager problem" I am trying to ... Steven Hill
03:48 PM Software Development: RE: CPU Clock and FPGA clock interaction
Based on what you have told me about Linux operating points, I won't be fooling with the CPU frequency. I will find ... Steven Hill
02:51 PM Software Development: RE: CPU Clock and FPGA clock interaction
Hi Steven,
If you need a specific frequency for your FPGA, I would recommend adding an external Crystal or Oscilla...
Michael Williamson
 

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