Project

General

Profile

Activity

From 07/17/2013 to 08/15/2013

08/15/2013

02:50 PM FPGA Development: RE: Problem programming FPGA with Linux driver
I guess I spoke too soon. I am still having this problem - with working FPGA code, sometimes I can get the cores to ... Steven Hill
12:34 PM FPGA Development: RE: Problem programming FPGA with Linux driver
I think I figured out the source of the problem myself. Although I didn't change anything in the module files for ba... Steven Hill
12:42 PM Software Development: RE: No DVI and serial output from MityDsp-L138 Industrial I/O board
I'm glad it's working Phil. I'm locking this thread, but if you have any other questions, please let us know.
Than...
Bob Duke
10:29 AM Software Development: RE: No DVI and serial output from MityDsp-L138 Industrial I/O board
Hi Bob,
There is no "Null Modem" printed on the serial cable provided with the dev kit. It works now after I put ...
Phil Chen

08/14/2013

06:57 PM FPGA Development: RE: Problem programming FPGA with Linux driver
I am using the Critical Link framework - the base module and the EMIFA interface are untouched. Steven Hill
06:08 PM FPGA Development: RE: Problem programming FPGA with Linux driver
If you are not using our framework (the base module, specifically), then the state will report failed as it is probin... Michael Williamson
04:06 PM FPGA Development: Problem programming FPGA with Linux driver
I'm having a problem programming the FPGA using the Linux driver. I am generating a core bin file using IMPACT, and ... Steven Hill
06:02 PM Software Development: RE: No DVI and serial output from MityDsp-L138 Industrial I/O board
Phil, can you confirm that the serial cable provided with the dev kit has "Null Modem" printed on each connector?
...
Bob Duke
11:24 AM Software Development: No DVI and serial output from MityDsp-L138 Industrial I/O board
We just got the board from Digi-key.
Module Part Number: L138-FX-225-RC S/N: 110174
I/O Board Number: 80-000268R...
Phil Chen
02:13 PM PCB Development: RE: MityDSP-L138 base board schematic
At the moment I'm using the Industrial IO board and stopping the ARM in uBoot, so I can prototype DSP code.
Event...
Christopher Brunson
02:02 PM PCB Development: RE: MityDSP-L138 base board schematic
The SOM schematics are not directly available. You should contact Tom Catalino if you require additional information... Michael Williamson
02:00 PM PCB Development: RE: MityDSP-L138 base board schematic
I have the Industrial IO board schematic I am trying to find the SOM schematics.
Sorry for the confusion,
Chris.
Christopher Brunson
01:56 PM PCB Development: RE: MityDSP-L138 base board schematic
Use this link:
"http://support.criticallink.com/redmine/projects/indio/wiki/Industrial_IO_Revision_Information":ht...
Michael Williamson
12:32 PM PCB Development: MityDSP-L138 base board schematic
Hi,
I'm designing a carrier board for the MityDSP-L138 and was wondering where I could download the MityDSP-L138 b...
Christopher Brunson
10:36 AM Software Development: RE: EMIFA Clock not present
Yes, we are using non-FPGA modules. Double checked the schematic, reprobed, tried different SOM modules, checked the... Mary Frantz
09:43 AM Software Development: RE: DSP EDMA IRAM DATA TRANSFER
Hello again,
Basically I am trying to access an address space defined in my .tcf file (identical with DSP-side Hello...
Rafał Krawczyk

08/13/2013

10:48 PM FPGA Development: RE: Programming FPGA on power up issues
Hi,
We have resolved that issues.
We used EDK system to develop FPGA and we modified bitgen.ut below:
-g TdoP...
minh tung
06:33 PM FPGA Development: RE: Programming FPGA on power up issues
Hi,
Sorry for the delay, are you still having issue here? Or have you solved the issue?
Can you dump your u-bo...
Michael Williamson
06:35 PM Software Development: RE: DSP EDMA IRAM DATA TRANSFER
0x11822000 is not in DDR space, are you trying to access local SRAM or DDR?
-Mike
Michael Williamson
05:27 PM Software Development: RE: EMIFA Clock not present
Hmm.... The EMA_CLK output should be active on power up, is it possible on your customer board there is contention. ... Michael Williamson
11:13 AM Software Development: EMIFA Clock not present
The EMIFA clock is not active on our custom board. This signal goes high and stays there. This is true after bootin... Mary Frantz
09:31 AM Software Development: RE: Problems with custom board
Thanks for the update.
-Jonathan
Jonathan Cormier
09:29 AM Software Development: RE: Problems with custom board
The problem was the GPIO. We had set the two I2C io pins as GPIO. I removed these from the list in the custom board... Mary Frantz
09:11 AM Software Development: RE: DSP connection to FPGA cores
Yes.
Michael Williamson

08/12/2013

07:12 PM Software Development: RE: DSP connection to FPGA cores
Should I assume that, since I have not had a reply to my last message, my comments in that message are correct? Steven Hill

08/11/2013

10:03 PM Software Development: RE: DSP connection to FPGA cores
Thanks for a very quick reply. So if I read or write from 0x66xxxxxx I will generate CS5 and if I read/write from 0x... Steven Hill
07:17 PM Software Development: RE: DSP connection to FPGA cores
I don't understand what you mean by "I can't use memory mapping as this is only useful for the ARM processor.".
Th...
Michael Williamson
06:42 PM Software Development: DSP connection to FPGA cores
For previous history, see the various messages and replies in "Simple Example Needed" below. I was able to get a cus... Steven Hill

08/09/2013

09:18 AM Software Development: RE: RTC issue?
Hi Kevin,
Would you be willing (offline) to share your schematics so that we might take a peek?
It's not obviou...
Michael Williamson

08/06/2013

11:15 AM Software Development: RE: Watchdog
Yes,
You'd want to compile the davinci watchdog kernel module.
Jonathan Cormier
11:11 AM Software Development: Watchdog
Is there a watchdog timer implemented in the MityDSP configuration anywhere that would restart Linux should the syste... Fred Weiser
07:21 AM FPGA Development: RE: Programming FPGA on power up issues
I have done 2 way CPU,Linux and u-Boot. But result is the same. minh tung
07:15 AM FPGA Development: RE: Programming FPGA on power up issues
How are you loading via CPU, linux or via u-Boot?
Michael Williamson
06:45 AM FPGA Development: Programming FPGA on power up issues
Hi,
I am using MityDSP-L138F(LX16 FPGA) and Carrier Board.
I developed new FPGA system that included only Upp Inter...
minh tung

08/05/2013

11:32 AM Software Development: RE: RTC issue?
I've check with the HW designer and he thinks it should be OK, see his info below
"The 3V_RTC pin of the L138 Modu...
Kevin Robertson
11:08 AM Software Development: RE: RTC issue?
Have you measured the Battery Backup voltage on your board through a power cycle? If the backup voltage drops below ... Michael Williamson
10:47 AM Software Development: RTC issue?
Hi,
We are seeing an issue with the L138 RTC not running on our custom board - using hwclock we never see the time...
Kevin Robertson
06:18 AM Software Development: RE: Calculating FFT using SigProcTIDspSupport in SigProc library
Hello,
It was the cause-thank you very much.It works. Curious enough, I now realised that the corrected implementati...
Rafał Krawczyk

08/04/2013

02:52 PM Software Development: RE: Calculating FFT using SigProcTIDspSupport in SigProc library
I think your problem is here:
for(int i=0;i!=FFT_SIZE;i+=2)
{
mpWorkBuff[i]=sin21[i];
mpW...
David Rice
12:49 PM Software Development: Calculating FFT using SigProcTIDspSupport in SigProc library
Hello,
I am trying to compute the FFT from 2 signals at once. So far I managed to compute the FFTs of my signals bas...
Rafał Krawczyk

08/03/2013

03:47 PM Software Development: RE: DSP EDMA IRAM DATA TRANSFER
Hello again,
Is there any way to set a variable to be stored in specific address ? Using the EDMA I have transferred...
Rafał Krawczyk

08/02/2013

04:31 PM Software Development: RE: DSP EDMA IRAM DATA TRANSFER
Hello,
I added the line with _HWI_eventMap(anHWInterruptLevel, globalConfig[Edma3InstanceId].xferCompleteInt)_ in Ds...
Rafał Krawczyk
09:50 AM Software Development: RE: DSP EDMA IRAM DATA TRANSFER
Heads up. Make sure that you configure the Event Mapper for the quick DMA transfer complete status to the DSP proper... Michael Williamson
10:57 AM Software Development: RE: Problems with custom board
Mary,
AUFS is a filesystem. It isn't a problem. Your .config file matches ours so doesn't appear to be the issue...
Jonathan Cormier
10:54 AM Software Development: RE: Problems with custom board
The two baseboard entries don't sound like a problem:... Mary Frantz
10:40 AM Software Development: RE: Problems with custom board
... Jonathan Cormier
10:07 AM Software Development: RE: Problems with custom board
Thanks for the reply. We fixed the ethernet problem with a pullup on MII_RXD0, as was done on the industrial io boar... Mary Frantz
09:52 AM Software Development: RE: Problems with custom board
You may not have the proper configuration options set for the Power Management and Voltage Regulators set in the kern... Michael Williamson
09:14 AM Software Development: RE: Problems with custom board
According to your bootlog the following errors would cause the cpufreq directory to be missing as cvdd is needed.
...
Jonathan Cormier

08/01/2013

11:58 AM Software Development: Problems with custom board
I built a new kernel based on MDK_2012-08-10 starting with baseboard-industrialio.c and making a new baseboard file f... Mary Frantz

07/31/2013

02:34 PM Software Development: RE: mtd->read (...) returned ECC error
Christian,
It is helpful for us if you create a new post so that we see it otherwise your might be missed. If you...
Jonathan Cormier
11:37 AM Software Development: RE: DSP EDMA IRAM DATA TRANSFER
Hello,
In fact I did not and it was the cause. When I invoked the method, EDMA started to transfer data properly ! T...
Rafał Krawczyk
10:26 AM Software Development: RE: DSP EDMA IRAM DATA TRANSFER
Hi,
You need to make sure that you call tcDspQDMA::Initialize() with a free hardware level (try 7). Did you make ...
Michael Williamson

07/29/2013

03:36 PM Software Development: DSP EDMA IRAM DATA TRANSFER
Hello,
I am currently programming the DSP of MitydspL138 Industrial IO Board using the DSP/BIOS. I am trying to tran...
Rafał Krawczyk
09:41 AM Software Development: RE: DSP GPIO interrupts (No-FPGA)
Hello again,
It works ! Invoking EventMap with an appropriate second argument solved the problem:
HWI_eventMap(6, 6...
Rafał Krawczyk
08:43 AM Software Development: RE: DSP GPIO interrupts (No-FPGA)
For the DSP Event Map (item number 1), refer to table 3-1 of the TRM in section 3.2.2.1.
GPIO Bank zero event appe...
Michael Williamson
08:02 AM Software Development: RE: DSP GPIO interrupts (No-FPGA)
A little corrction in what I have written in my previous mail- for bank 0 offset 0 (J701 pin 25) the function call sh... Rafał Krawczyk
07:43 AM Software Development: RE: DSP GPIO interrupts (No-FPGA)
Hello again,
First of all,thank you for your quick reply.
I am trying to implement the solution focusing on your ...
Rafał Krawczyk

07/28/2013

08:19 PM Software Development: RE: DSP GPIO interrupts (No-FPGA)
Hi,
So currently the DspGpio.cpp implementation (for non-FPGA GPIO's) for the 674X core is does not implement inte...
Michael Williamson
02:55 PM Software Development: DSP GPIO interrupts (No-FPGA)
Hello,
I am currently programming the DSP using the DSP/BIOS . The problem I have is how to configure HWI in J701 p...
Rafał Krawczyk

07/26/2013

11:33 AM Software Development: RE: Kernel bug
Hi Mostafa,
Thank you for the notice.
I see that is in the master branch (2.6.34). We will correct it. Howeve...
Michael Williamson
08:44 AM Software Development: Kernel bug
Hi, just wanted to make you aware of a bug in the kernel sources:
http://support.criticallink.com/gitweb/?p=linux-...
Mostafa Afgani

07/24/2013

06:13 PM Software Development: RE: UPP "start" signal ignored in receive mode?
Hi Stu,
Have you tried to use chipscope to confirm the alignment of the start strobe with the data as sent by the ...
Michael Williamson
12:53 PM Software Development: RE: UPP "start" signal ignored in receive mode?
Scott,
Yes, we're trying to send one line (of 6176 bytes) per DMA memory buffer (also 6176 bytes). The "DspUpp.c"...
Stewart Cobb

07/23/2013

05:52 PM Software Development: RE: UPP "start" signal ignored in receive mode?
Hi Stu,
Check section 33.2.5.3 of the TRM. For receive mode, the start line is optional, controlled by the STARTx...
Michael Williamson
04:56 PM Software Development: RE: UPP "start" signal ignored in receive mode?
Stu,
I'm not sure about the DSP driver for uPP, I am using a Linux driver to the Arm. Are you trying to stream data...
Scott Whitney

07/22/2013

03:52 PM FPGA Development: RE: EMA_WAIT and bus contention on L138F
Hi Mike, relevant definitions from the header:... Mostafa Afgani
02:11 PM FPGA Development: RE: EMA_WAIT and bus contention on L138F
Just for sanity,
Have you confirmed you are writing to the correct AEMIF registers? CE3 is the NAND, and you are ...
Michael Williamson
01:42 PM FPGA Development: RE: EMA_WAIT and bus contention on L138F
Hi Mike,
I've now also tried setting unused I/O to float and increasing both the TA and Read Hold to 4 cycles. I'v...
Mostafa Afgani
03:22 AM Software Development: UPP "start" signal ignored in receive mode?
We have an FPGA application for the MityDSP-138F board which transmits "packets" to the DSP through the UPP port. Th... Stewart Cobb
01:25 AM Software Development: RE: Fail to mount Root FS from MicroSD card
Ok, managed to fix the problem.
I have changed mityomapl138_mmc_get_ro() in board-mityomapl138.c to return(0) since ...
Dmitry Gorulko

07/21/2013

10:19 PM Software Development: RE: Fail to mount Root FS from MicroSD card
Hello, Tim!
Comma makes no difference, I have tried.
I have got a little progress - I have changed bootargs as ...
Dmitry Gorulko
07:27 AM Software Development: RE: Fail to mount Root FS from MicroSD card
Dmitry,
I believe yhou are missing a comma in your bootargs..
root=/dev/mmcblk0p1 rw rootwait
should be
root=/dev...
Tim Iskander
04:40 AM Software Development: Fail to mount Root FS from MicroSD card
Hello!
I am trying to mount Root FS from MicroSD card (ext2 formated).
Boot process fails with kernel panic.
My ...
Dmitry Gorulko

07/18/2013

06:50 PM Software Development: RE: RS-485 problems
Solved the problem myself - it turns out that either SER_RS485_RTS_ON_SEND or SER_RS485_RTS_AFTER_SEND must be define... Steven Hill
05:54 PM Software Development: RE: RS-485 problems
OK, then it all makes sense. In spite of the way the connector is shown in the documentation I was assuming (never a... Steven Hill
05:20 PM Software Development: RE: RS-485 problems
Actually, I take that back. The pin out is illustrated in Figure 2 of the specification....
-Mike
Michael Williamson
05:13 PM Software Development: RE: RS-485 problems
Ah,
I think I may see the problem. Those connectors are pinned (on our PCB) for use with a ribbon cable and a DB-...
Michael Williamson
05:08 PM Software Development: RE: RS-485 problems
My board is 80-000268RI-2B, S/N 132541. I looked at the appropriate document on the page you referenced, and while i... Steven Hill
04:59 PM Software Development: RE: RS-485 problems
Hi Steven,
Let's make sure you are referencing the correct revision information for the board (it has been updated...
Michael Williamson
04:07 PM Software Development: RE: RS-485 problems

I am looking at pins on J504, based on the Industrial IO Board rev C documentation
Curiously, only pins 1,2,3,4,...
Steven Hill
03:27 PM Software Development: RE: RS-485 problems
OK, here is what I see:
mitydsp@mitydsp-VirtualBox:~/linux-davinci$ git branch
master
* mitydsp-linux-v3.2
mi...
Steven Hill
03:24 PM Software Development: RE: RS-485 problems
I am assuming it compiled OK.
Are you sure that the write() call is returning successfully? Can you send the full...
Michael Williamson
03:22 PM Software Development: RE: RS-485 problems
Btw press q to escape @git log@. Jonathan Cormier
03:21 PM Software Development: RE: RS-485 problems
Steven,
Run the command @git branch@ to see which branch is selected. It should say mitydsp-linux-v3.2. When you...
Jonathan Cormier
03:18 PM Software Development: RE: RS-485 problems
OK, I built the new kernel and flashed it to the MityDSP - now uname gives:
Linux mityomapl138 3.2.0+ #1 PREEMPT T...
Steven Hill
02:43 PM Software Development: RE: RS-485 problems
Sorry - my mistake. I re-installed the toolchain and then realized that I had typed "CROSS-COMPILE" instead of "CROS... Steven Hill
02:06 PM Software Development: RE: RS-485 problems
I seem to have the same problems - here is the output from a new shell:... Steven Hill
01:52 PM Software Development: RE: RS-485 problems
You only use the HOST native CC, not the cross tools, to build the config file. It seems like you have a CC environm... Michael Williamson
01:41 PM Software Development: RE: RS-485 problems
I'm getting errors when I try to build the kernel:
mitydsp@mitydsp-VirtualBox:~/linux-davinci$ make ARCH=arm CROSS...
Steven Hill
11:26 AM Software Development: RE: RS-485 problems
If you have our repository cloned already....... Michael Williamson
11:14 AM Software Development: RE: RS-485 problems
A newbie question - How do I build this particular branch of the kernel? Steven Hill
10:34 AM Software Development: RE: RS-485 problems
Thanks for your response. Here is what I get from uname:
Linux mityomapl138 3.2.0 #1 PREEMPT Wed May 15 09:16:03 ED...
Steven Hill
12:30 PM FPGA Development: RE: EMA_WAIT and bus contention on L138F
One thought:
Is it possible the tri-state drive logic for the data lines off the FPGA is creating bus contention? ...
Michael Williamson
12:24 PM FPGA Development: RE: EMA_WAIT and bus contention on L138F
Hi Mike,
Thanks for the suggestions.
Not sure I understand what you mean by FPGA access bandwidth. It is being ...
Mostafa Afgani

07/17/2013

09:17 PM Software Development: RE: RS-485 problems
OK. I have added the patch to the mitydsp-linux-v3.2 branch. You should be able to at least see the Tx line toggle ... Michael Williamson
08:55 PM Software Development: RE: RS-485 problems
Hi Steven,
Sorry for the confusion. It's not a menuconfig item. There is a patch needed to enable the UART2 pin...
Michael Williamson
08:32 PM Software Development: RE: RS-485 problems
How would anyone know this? I have looked at the config of the kernel I am using and you are correct, these pins are... Steven Hill
07:05 PM Software Development: RE: RS-485 problems
Hello,
Is is possible your kernel may not be setting up the ARM pin multiplexing for UART2? In your baseboard file...
Dominic Giambo
06:48 PM Software Development: RE: RS-485 problems
I have attached the files defining the class and showing how I open the serial port. Then I just use standard write c... Steven Hill
05:07 PM Software Development: RS-485 problems
I am trying to get the RS-485 running on my Industrial I/O board with the L-138F. I'm using the example code in "sen... Steven Hill
07:38 AM FPGA Development: RE: EMA_WAIT and bus contention on L138F
Hello,
How much bandwidth are you using for the FPGA accesses? Have you looked with any sort of bus analyzer (per...
Michael Williamson
 

Also available in: Atom

Go to top
Add picture from clipboard (Maximum size: 1 GB)