Activity
From 12/17/2012 to 01/15/2013
01/15/2013
- 07:14 AM Software Development: RE: How Can I use UART0 & UART2 in MityDSP-L138F?
- You should be able to disable the ethernet device by setting the ethernet configuration in u-Boot to indicate no ethe...
- Hi I'm currently using your MityDSP-L138F SOM with custom baseboard which I designed.
In Our Baseboard UART0(pin 81 ... - Hi,
I have problems connecting to the industial IO/AM1808 card using device USB. I have built the kernel and the e... - 04:12 AM Software Development: RE: AM1808-industrilal I/O performance
- Thanks,
Missed that one - it's working.
Mads-l
01/14/2013
- 03:46 PM FPGA Development: RE: Creating FPGA Base-Project - core manager problem
- Hi Greg,
i opend the "build_lcd_rev_c" example project and migrate it to the 14.4 version. I think the migrtion wo...
01/13/2013
- 09:39 PM Software Development: RE: Debugging DSP in VirtualBox?
- I have being using SD XDS510 USB + VirtualBox 4.1.16 + CCS 5.2.0 with no problems.
- 05:07 PM FPGA Development: RE: Creating FPGA Base-Project - core manager problem
- Hi Christian,
The ISE Webpack license should be sufficient for what you are trying to do.
Try opening one of ...
01/12/2013
- Hi,
I've started with the FPGA-design in ISE Webpack 14.4.
I added all files from "MDK_2012-08-10\fpga\vhdl" to ... - 02:11 PM Software Development: RE: DSP Link example not working
- Mike,
I got it and it's working now :)
Thanks.
Christian - 02:10 PM Software Development: RE: u-Boot configuration for DSP-Startup
- Tim,
It's working now.
Thanks!
Christian
01/10/2013
- 12:18 PM Software Development: RE: PRU Kernel Driver
- The PRU drivers are not installed. You'll need to rebuild the kernel. You may need to patch in the PRU drivers as w...
- Do any of the kernels built by critical link have the PRU drivers installed? Or do I have to rebuild a kernel with th...
- 08:14 AM Software Development: RE: AM1808-industrilal I/O performance
- Oh. You should be all set, see [[Setting_CPU_Speed]].
-Mike
- 08:11 AM Software Development: RE: AM1808-industrilal I/O performance
- Hi,
Yes - both kernel settings is set to 'y'.
root@vdr:/sys/devices/system/cpu/cpu0/cpufreq# cat scaling_availa... - 07:58 AM Software Development: RE: AM1808-industrilal I/O performance
- Can you check if CONFIG_CPU_FREQ=y is set in the 3.1 kernel configuration. Also can you confirm that the CONFIG_CPU_...
- 02:24 AM Software Development: RE: AM1808-industrilal I/O performance
- Hi,
I am usually running the 3.1.x kernel that I build from the git repository downloaded from Critical link. Here...
01/09/2013
- 11:38 AM FPGA Development: RE: FPGA GPIO: toggle problem
- Dear all,
by the way, Greg was right saying that the GPIO core configuration I posted the first time could work (I... - 10:07 AM FPGA Development: RE: FPGA GPIO: toggle problem
- ON the bitfile generation, please make sure that your unused IOBs are "floating" and not pulled down or up.
-Mike
- 09:58 AM FPGA Development: RE: FPGA GPIO: toggle problem
- Hi Michele,
The only time I've experienced the board reseting due to an FPGA load is when I was mistakenly loading... - 05:25 AM FPGA Development: RE: FPGA GPIO: toggle problem
- Hi Greg,
thank you for the hint and the fast answer!
Now I have another problem: I modified the GPIO instantiation ... - 09:06 AM Software Development: RE: AM1808-industrilal I/O performance
- What version of the kernel are you using? The pre-programmed one on FLASH? That version of the kernel may be older ...
- 08:03 AM Software Development: RE: AM1808-industrilal I/O performance
- This is the "factoryconfig" printout:
U-Boot > factoryconfig
Factory Configuration:
Config Version : 1.1
MAC Ad...
01/08/2013
- 12:54 PM FPGA Development: RE: FPGA GPIO: toggle problem
- Hi Michele,
The reason that you're not seeing the echo'ed value of the GPIO change is due to the way the core is c... - 09:53 AM FPGA Development: RE: FPGA GPIO: toggle problem
- Sure Greg, thanks for the help!
The name is IndustrialIO_top, because I worked on it from your file..
- 08:59 AM FPGA Development: RE: FPGA GPIO: toggle problem
- Hi Michele,
Could you post your VHDL instantiation of the GPIO core? Perhaps some of settings or ports were set i... - Dear All,
after I successfully created a GPIO core on the FPGA framework, burnt onto the FPGA, successfully enumer... - 09:48 AM Software Development: RE: AM1808-industrilal I/O performance
- In u-boot, run the command "factoryconfig".
-Mike
- 09:31 AM Software Development: RE: AM1808-industrilal I/O performance
- Here is some information - cannot get any useful information from the bootlog.
*From Bootloader startup:*
Jumpi...
01/07/2013
- 12:38 PM Software Development: RE: MSGQ access
- The answer was in the Makefile. I had to add in all the defines.
DEFINES=-DTRACE_ENABLE \
-DOS_LINUX \
-DMAX_... - 09:20 AM Software Development: RE: MSGQ access
- Hi Mary,
I think the reason you're getting a compiler error is because you're only including a single file from t...
01/04/2013
- Is there a way to use the MSGQ library? I would like to call MSGQ_locate() and MSGQ_close(). I have a project based ...
- 10:43 AM Software Development: RE: AM1808-industrilal I/O performance
- Hi Mads-l,
Can you print out the factory configuration information? Certain modules (Revision "A" silicon, IT sil... - I am currently testing network performance. Having installed the netperf utility in my root file system, I am able to...
01/03/2013
- Has there been any work done regarding a Profibus master on the MityArm AM1810?
01/02/2013
- 09:01 AM PCB Development: RE: SATA board connector
- Alex,
I haven't had the opportunity to get a SATA connector for our board. That is the one I was looking at. I lik...
12/31/2012
- 10:17 AM PCB Development: RE: Used EMIFA-Signals/Pins
- That's great Mike - exactly what I hoped to hear :)
I was wondering if you had done precisely this given that the ... - 08:10 AM PCB Development: RE: Used EMIFA-Signals/Pins
- Hi Conor,
On the Non-FPGA modules, all 4 of these signals have a 1K Ohm series resistor between the on-board nets ... - 07:49 AM PCB Development: RE: Used EMIFA-Signals/Pins
- In the case of the Industrial IO board though, pins 197 through 200 are tied directly to 3.3V for the VCCO_[0,1] bank...
12/27/2012
- 01:51 PM Software Development: RE: Debugging DSP in VirtualBox?
- Do you know of any emulators that are useable from within the current Oracle VirtualBox or is there a work around? I...
12/26/2012
- 03:55 PM Software Development: RE: SYSBIOS & Starterware
- Hi Jean-Baptiste -
It would be my understanding that if you are going to use SYS/BIOS that you should start with ...
12/23/2012
- 09:36 PM Software Development: RE: after update the root-FS and Kernel NFS errors appear at startup
- The most recent filesystem involved transitioning from Anstrom 2008 to Angstrom 2012.05, which also migrated from the...
- 10:48 AM Software Development: RE: after update the root-FS and Kernel NFS errors appear at startup
- To give you more inforamtion about the startup sequence I add the whole log-file of it.
Can it be that there is so... - Hi,
I updated the Root-File-System on my module with the Base-FS out of the latest MDK (2012-08-10). I copied also... - 09:28 PM Software Development: RE: DSP Link example not working
- Ok,
I will post to your other topic for enabling the network on the newer MDK.
Are you building the example sof... - 03:04 PM Software Development: RE: DSP Link example not working
- Mike,
sorry for my really late response....
I was using the factory installed filesystem with the associated ke...
12/22/2012
- 07:24 PM Software Development: RE: u-Boot configuration for DSP-Startup
- Christian
this page
http://support.criticallink.com/redmine/projects/arm9-platforms/wiki/DSP_Quick_Start
should ... - 07:19 PM Software Development: RE: u-Boot configuration for DSP-Startup
- Thank you Tom for your quick answer!
For the moment I have a DSP-only setup but later I want to use both: Linux an... - 07:11 PM Software Development: RE: u-Boot configuration for DSP-Startup
- Christian
You can store the DSP image in flash. I am assuming you are running a DSP-only setup (i.e. no linux system... - Hi,
At the moment I'm at a point where I don't know how...
I have a DSP-image and want to load it at the startu...
12/20/2012
- 09:49 PM FPGA Development: RE: Pinout on L138-FG-225-RC
- Michele,
In response to your GPIO bank question:
Yes you can use a single core in the FPGA and have it utilize ... - 09:44 PM PCB Development: RE: SATA board connector
- Scott,
Just wondering if you found a drop in replacement. We actually just tried doing this on an in-house test fi... - 09:39 PM Software Development: RE: tftp access violation
- Wade,
I'm going to take a stab in the dark here on a suggestion to give you something to try. If you think you may... - 09:26 PM Software Development: RE: The Jtag Interface
- If you can wait approximately a week or two Digikey should have them in stock for ordering (http://www.digikey.com/pr...
- 08:33 PM Software Development: RE: The Jtag Interface
- hi mike
I buy a 1808-FX-225-RC. it is without the adapter board. How can I get one？
thanks - 09:49 AM Software Development: RE: New UBoot Image That Fixes Bootelf Hang When Running Starterware
- Sorry for the delay.
The code to support the updated features was checked into our "git server":http://support.cri... - 09:34 AM Software Development: RE: New UBoot Image That Fixes Bootelf Hang When Running Starterware
- Was there an official release?
What / where is the latest/greatest? - 09:41 AM Software Development: RE: PROC_read()
- Or.... you can use PROC_read, but you need to build your own synchronization hooks. This is what Greg was alluding t...
- 09:40 AM Software Development: RE: PROC_read()
- The PROC_read() API is not guarded. It's effectively a memory copy (dealing with the VM addressing under linux).
... - 09:21 AM Software Development: RE: PROC_read()
- Greg,
Can you clarify your answer with a bit more detail? Are you saying that the DSP should send a message to the...
12/19/2012
- 02:54 PM Software Development: RE: PROC_read()
- Hi Terrence,
What I've seen done here in situations like you are describing is to use the dsplink interfaces and ... - 02:45 PM Software Development: RE: PROC_read()
- To clarify. I am using Critical Link's API MityDSP::tcDspApp to load the DSP application, configure the shared memor...
- I have a shared memory read issue between the ARM and DSP processor that I am trying to resolve. I am using PROC_rea...
12/18/2012
- 09:38 AM FPGA Development: RE: I2C issues on SLX45
- Further - I broke my OLED writes into < 32 bytes each and retested. That works fine and if it was unreliable, the pic...
- 08:54 AM FPGA Development: RE: I2C issues on SLX45
- Hi guys. Got a chance to test this today. That's a lot better! The i2cdetect scan picks up the device and shows "--" ...
- 09:00 AM FPGA Development: RE: Xilinx design suite 14.2 and MDK_2012-08-10
- The EMIFA DCM may not be required. If you do not require any other clocks than the 100 MHz (when running at 300 MHz ...
- 08:32 AM FPGA Development: RE: Xilinx design suite 14.2 and MDK_2012-08-10
- Hmmm. Not sure now because I'm afraid I didn't use the DCM at all! I didn't connect the i_ema_clk directly but via a ...
- 08:13 AM FPGA Development: RE: Xilinx design suite 14.2 and MDK_2012-08-10
- Dear Conor,
I appreciate your help!
I have the suspect that the component emaclkdcm-Emifa_dcm is a digital cloc... - 05:43 AM FPGA Development: RE: Xilinx design suite 14.2 and MDK_2012-08-10
- The learning curve for Xilinx tools is pretty darn steep anyway without jumping in at the deep end!
What *I* did i...
12/17/2012
- Hello,
I'm working to a project with a MityOMAP-L138-FX-225-RC.
Currently, I try to use SYSBIOS into this module... - 01:44 PM FPGA Development: RE: Xilinx design suite 14.2 and MDK_2012-08-10
- Dear Jean-Pierre,
I am a newbie too in fpga programming: could you please post me a suggestion about the solution?
... - 10:20 AM FPGA Development: RE: I2C issues on SLX45
- Scratch that - I see -DDEBUG is in the Makefile :)
- 10:17 AM FPGA Development: RE: I2C issues on SLX45
- No worries Mike. I used to be a QA guy so I must have a knack for finding these things! Like communicating with a non...
- 09:17 AM FPGA Development: RE: I2C issues on SLX45
- Hi Conor,
I am updateing (via editing) the patch on the previous post. We've finished some testing here and found...
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