Activity
From 10/02/2011 to 10/31/2011
10/28/2011
- MC 04:59 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Is there an Embedded Linux USB-Serial device driver in the kernel?
- The Serial Gadget device is exactly what I am trying to do. thanks for the link, I will post how this goes.
Mike - JP 02:44 PM ARM9 Based QNX Platforms Software Development: RE: FPGA Driver
- Mark,
The files under /dev/fpga are not intended to be executed. They are intended to be opened and then read from or written to. They are created by the fpga-omapl1xx resource manager. As shown in the examples on the wiki page, you c... - ML 02:27 PM ARM9 Based QNX Platforms Software Development: RE: FPGA Driver
- Tried that - now I'm having a very strange, possibly unrelated problem where the files created under /dev/fpga are created without the executable bit (e.g. 660 rather than 770). Even if I change the permissions they will not execute. N...
- MW 10:57 AM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: Adding a SPI peripheral through J700 on industrialIO board
- My take on that is the same. I'll need to check as to why those signals were brought to both connectors. I'll double check the layout for you and get back.
-Mike - MC 10:45 AM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: Adding a SPI peripheral through J700 on industrialIO board
- OK great, thanks. I will start another thread if I have any problems configuring the software. The schematic I have lists GP0_5, GP0_13, GP0_15 and GP0_6 all on J700. but I noticed they are all on J701 also, just checking that this is ...
- MW 10:05 AM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: Adding a SPI peripheral through J700 on industrialIO board
- The GP0[] nets on J700 should also be usable for chip selects.
-Mike
- MW 10:04 AM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: Adding a SPI peripheral through J700 on industrialIO board
- Hi Mike,
The SPI drivers support using a regular OMAP GPIO for a chip select to gang up multiple devices on a SPI bus, so you could use one of the OMAP_GP0[X] signals brought out to J701 as an alternate chip select. If you look at th... - Hi,
We are designing a underboard that will have additional peripherals attached to the industrialio board through the J700 pins. We are using a mitydspl138f module. I was hoping to use SPI1 with CS0 on J700, but I just noticed tha...
10/27/2011
- GG 05:40 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: L138F UART2 in Linux
- Just as an FYI (to possibly save you time in the future) linux-davinci/arch/arm/mach-davinci/da850.c has a number of pin groupings already defined.
So you could have enabled UART2 by just adding the following line to baseboard_init(): - MC 05:25 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: L138F UART2 in Linux
- Sorry scratch that last question.. I will do it in my C++ app settings.
- MC 05:22 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: L138F UART2 in Linux
- Dominic & Mike,
Thanks for all your help BTW.
Where can I configure the baud rates if the TAG structures are not used anymore? - MC 04:55 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: L138F UART2 in Linux
- ah that solves the mystery of no output .o files. I finally got the UART2 working using the baseboard-industrialio.c file. i added these lines of code (in case anyone else needs them)
- DG 04:20 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: L138F UART2 in Linux
- Mike,
If you build menuconfig (make menuconfig) and navigate -> System Type -> TI DaVinci Implementations -> Select Baseboard you will see a list of baseboards. These options set a variable in your kernel .config that causes the build... - MC 04:08 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: L138F UART2 in Linux
- Darn, I confused myself in hopes that I found a solution!
so how do I know which baseboard-xxx.c file is being compiled in? some files call out the I2C some call out the UART. But none have an output .o file after I build the kernel... - MW 03:50 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: L138F UART2 in Linux
- Hmmm...
Those aren't "default values", those are the values that the register will be programmed to if you add DA850_UART2_RXD to a call to da8xx_pinmux_setup() list.
I am looking at section 11.5.10 of the OMAP-L138 Technical Resou... - MC 03:39 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: L138F UART2 in Linux
- I found these lines in da850.c
according to this line the default value for those pins is 2, which means they are set to the I2C peripheral
MUX_CFG(DA850, UART2_RXD, 4, 16, 15, 2, false)
MUX_CFG(DA850, UART2_TXD, 4, 20, 15, 2, fal... - MC 01:36 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: L138F UART2 in Linux
- Hi Mike,
I looked into baseboard-hrsc.c and DA850_UART2_TXD is listed in the array. wouldn't this mean the pin-mux for those pins are configured for the UART2?
Also if I don't see .o files are these .c files being compiled? Do I ne... - MW 07:33 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: L138F UART2 in Linux
- Hi Mike,
You don't want to change the name of the MACHINE_START macro name. Put it back, otherwise the unit will not use any of the initialization code (if you google that MACHINE_START macro, you'll see why).
The UART config stuf... - JP 05:04 PM ARM9 Based QNX Platforms Software Development: RE: FPGA Driver
- Mark,
These is a mistake in the fpga driver as provided. It is printing out the virtual addresses for the cores in the fpga instead of the physical addresses. The virtual addresses are not real useful. The example in the wiki page shows: - ML 03:35 PM ARM9 Based QNX Platforms Software Development: RE: FPGA Driver
- Understood. I have a memory block in the FPGA that I was able to examine using mmap_device_memory().
The offset was a reference to the startup script:
@
#######################################################################
##... - JP 03:29 PM ARM9 Based QNX Platforms Software Development: RE: FPGA Driver
- Mark,
The 5 fpga device files (cmd, image, state, version, and devices) are for loading an image into the fpga and getting information about that loaded image. Think of them as fpga administrative tools.
I think what you are askin... - ML 02:51 PM ARM9 Based QNX Platforms Software Development: RE: FPGA Driver
- I have the FPGA driver loaded, with the FPGA mapped into 0x66000000.
If I want to access the FPGA for a user application how do I map it in? Just use the h/w address? The FPGA devices seem specific to the 5 commands you've created. Sho... - MW 08:47 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Is there an Embedded Linux USB-Serial device driver in the kernel?
- If you are interested in making the USB 2.0 port look like a virtual serial port, here is more information about the Serial Gadget device (you'll need to reconfigure your kernel to get this going).
http://www.mjmwired.net/kernel/Docum... - MW 07:16 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Is there an Embedded Linux USB-Serial device driver in the kernel?
- If you have the USB1.1 port hooked up (it is on the Industrial I/O profibus card, it's the a USB-A host connector), you can use pretty much any off the shelf USB to serial converter such as a Keyspan. If you have the drivers configured ...
10/26/2011
- MC 05:32 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: L138F UART2 in Linux
- Hi Mike,
I tried changing the enable field for UART2 in board-mityomapl138.c but I don't think there is any effect. - MC 03:27 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: L138F UART2 in Linux
- Hi Mike,
I see an option in board-mityomapl138.c to enable UART2 and will give that a shot.
It seems that there are setup files that are basic to the OMAP but there is an additional layer that CriticalLink brings into the picture.... - ML 03:57 PM ARM9 Based QNX Platforms Software Development: RE: Pin MUX
- Just saw a signal out of the port - thanks. It may have been a conflict with the I2C or something else we tried along the way that broke it. Either way this was a big help - thanks.
- JP 03:19 PM ARM9 Based QNX Platforms Software Development: RE: Pin MUX
- Mark,
I have tried using a scope on an INDIO board (80-000268RI-2 rev. B, serial number 110765) with a module (L138-FG-225-RC, serial #110441) and have the following results.
What I did:
* Started a new workspace
* Imported the... - ML 07:45 AM ARM9 Based QNX Platforms Software Development: RE: Pin MUX
- We are using RS-232 at TTL levels, so that is not a problem.
We had done all the steps you outlined and we are not seeing output from the pins using an scope.
- MC 03:24 PM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: PROFIBUS Dev Kit RS485 on J504
- OK, thanks for confirming Tom
- TC 10:24 AM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: PROFIBUS Dev Kit RS485 on J504
- Hi Mike -
You are correct, thank you for pointing this out. The table in the data sheet is from an older revision to the board before we moved the line drivers to an external, panel mounted (and currently customer supplied).
We w...
10/25/2011
- MW 07:32 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: L138F UART2 in Linux
- Hi Mike,
In the kernel in the arch/arm/mach-davinci area, you will find a bunch of calls for setting up the multiplex options for the various pins on the device. In this case, the board-mityomapl138.c and the baseboard-industrialio.c... - Hi,
it looks like UART2 is enabled in the default linux kernel. When i do
>dmesg | grep tty
3 uarts are shown to be setup.
Is there anything additional I need to do to use UART2? I tried writing a C++ app that writes some ... - MC 05:39 PM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: PROFIBUS Dev Kit RS485 on J504
- One more question on this...
I'm confused on the pinout of J504. the schematic that you guys sent of the dev board seems to not agree with the datasheet. see my pictures attached
Thanks
Mike - MC 04:23 PM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: PROFIBUS Dev Kit RS485 on J504
- Got it, thanks Tom
- TC 02:10 PM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: PROFIBUS Dev Kit RS485 on J504
- Hi Mike -
They are TTL and meant to ribbon cable to a small driver board that can be panel mounted to minimize stub length for PROFIBUS applications.
We may not have made that clear enough in the documentation and will take an ac... - Hi,
The RS485 pins on J504 of the PROFIBUS Dev Kit seem to be directly connected to UART2 of the mitydspL138F which are labeled UART2. Are they TTL, or are they converted to RS485 on the mitydspl138F module?
Thanks,
Mike - I have a L138F with profibus board and am looking into options for communicating with a PC. I'd like to use USB if possible. Is there a device driver in the linux kernel that will allow the OMAP to enumerate as a USB-Serial device on a...
- JP 04:32 PM ARM9 Based QNX Platforms Software Development: RE: Pin MUX
- Mark,
I do not know of any qnx code that has been used with this port. I have been talking with the hardware guys and it seems that this port is an expansion port. This means there needs to be additional hardware added depending on wh... - MW 03:22 PM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: mitydsp-L138F datasheet typo? MII_RXD or MII_DXD?
- If you are not using all the UPP pins, you might be able to use RMII (routed through the FPGA) to free up these pins. Also we do have an FPGA UART core that could be used for UART I/O.
-Mike
- MC 01:57 PM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: mitydsp-L138F datasheet typo? MII_RXD or MII_DXD?
- Hi Mike, thanks for the verify, and pointing out that those pins are used for the Ethernet control. I do need ethernet (mainly for gdb debugging) so i will keep looking around for other options.
- MW 12:39 PM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: mitydsp-L138F datasheet typo? MII_RXD or MII_DXD?
- Hi Mike,
You are correct, there is a typo in the datasheet. We'll update the sheet, thanks for pointing it out. In the meantime, the signals you are concerned about should be:
| Pin | Function | Pin | Function |
| 75 | I/O MII_... - Hi, I am confused with the terminology used in the mitydsp-l138f datasheet (july 12 2011)
Pins 79, 81, & 83 are labeled MII_*DXD*[1,2,3]. Is this a typo? should they be labeled MII_*RXD*[1,2,3]?
75 I/O MII_RXDV 76 I/O MII_TXD3
7... - MW 12:47 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: FPGA part number
- XC6SLX45-2CSG324C
-Mike
- MW 12:33 PM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: uPP Test Points
- Unfortunately, no. There are no easily available vias for these signals.
- MW 12:31 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: jffs2 check
- Hi Thomas,
Sorry for the delay. If you wanted to verify the NAND write (and you have enough memory), I believe you should be able to do a - SW 09:07 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uPP receive problem
- Mike,
Thanks for looking at the snippets of code I sent you. I have set the enable bit in my driver. I didn't send the whole thing, its a hot mess right now. Yesterday I had our fpga designer switch the tx and rx channels between t... - MW 08:23 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uPP receive problem
- Hi Scott,
Sorry for the delay. You are using the receive channel *much* differently than we typically do (we use the Start and Enable signals pretty much according to the diagrams shown in the UPP users guide, or now in the Technical...
10/24/2011
- RG 04:26 PM ARM9 Based QNX Platforms Software Development: RE: ClockPeriod
- John,
The timer_load callout only gets called when you change the system tick period, so it will only be indeterminate (and expected to behave that way) for a single tick. And with either fix you need to reset the timer count otherwi... - JP 03:55 PM ARM9 Based QNX Platforms Software Development: RE: ClockPeriod
- Rob,
I think the method I described was a way of giving the timer control over the reload so it could be done gracefully.
Your method sounds like it would be fine for a situation where you have some setup changes to do and don't re... - RG 03:44 PM ARM9 Based QNX Platforms Software Development: RE: ClockPeriod
- Hi John,
I need to do more testing, but it looks like I have a fix. You cannot change the timer's period while it is running, so I modified the timer_load callout to stop the timer first and zero the counter before changing the perio... - GG 04:06 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: RS-485 failure to operate
- Hi Mark,
My initial inclination would be to make sure that the pinmux is set correctly. Section 11.5.10 in the OMAP-L138 Reference Guide has more details on this if you haven't already verified these settings.
Are you trying to com... - Using a MityDSP L178 with industrial IO board 80-000268RI-2
Trying to use RS-485 via J504 - there are no signs of life on any of the pins - even tried manipulating the GPIOs directly. Any ideas?
Note: We were able to toggle other G... - ML 03:25 PM ARM9 Based QNX Platforms Software Development: RE: Pin MUX
- We were able to toggle other GPIO lines that come out the connectors on the back, but unable to see any activity with GP0[8], nor GP1[2] or GP1[3], or in fact any pin on J504.
We are using a scope to look at the pins.
I've tried all th... - JP 11:32 AM ARM9 Based QNX Platforms Software Development: RE: Pin MUX
- Mark,
I did not understand the details of uart 2 on our kit before. As I understand it now, it is connected as a half-duplex RS-485 interface. If you are expecting to see rs-232 serial port activity, this is not going to work. If you ... - ML 10:55 AM ARM9 Based QNX Platforms Software Development: RE: Pin MUX
- It may be more of a hardware problem - we have the industrial IO board 80-000268RI-2 serial 110759 and we see no RS-485 signal out of J504 that makes any sence. We've also tried Linux and failed to get output there too.
- ML 10:21 AM ARM9 Based QNX Platforms Software Development: RE: Pin MUX
- Here is a snapshot of my last attempt (attached)
Devices configured:
EMAC (RMII)
EMIFA/EMIFB
MMC/SD1
UART0,1,2
SPI0 (SCS 0 and 1 only as 2-5 collide with UART 0)
SPI1 (SCS 0 and 1 only as 2-5 collide with UARTS 1&2)
I2C0
The... - JP 09:48 AM ARM9 Based QNX Platforms Software Development: RE: Pin MUX
- Mark,
Please send you pinmux (both the .pin and the .h files) and startup script files. You can just attach them to a forum message reply using the Files and Add another file links.
The startup script files will need to make sure t... - ML 07:47 AM ARM9 Based QNX Platforms Software Development: RE: Pin MUX
- We aren't having any luck, John will try to call, and we've sent along the files.
10/21/2011
- SW 02:34 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uPP receive problem
- Mike,
I will attach the upp control settings and dma descriptor settings. I know in the end I want to use the enable on the receive channel. I had disabled that in testing just to see if any data was clocked in. What worries me is ...
10/20/2011
- MW 05:47 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uPP receive problem
- On the MityDSP-L138F, the voltage domain for the UPP (and for the FPGA bank connected to the UPP) is 1.8 Volts.
I'm not entirely sure, on receive, you want to disable the start and enable lines. It might be useful to post your UPP re... - SW 04:56 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uPP receive problem
- Tom,
I understand the handshaking can be a problem. I have the uPP running with the highest divisor now at ~4.68 MHz xmit clock. My concern is that I have disabled the start and enable on the receive channel. With those disabled I ... - TC 01:23 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uPP receive problem
- Hi Scott -
Thanks for posting.
I talked to the guys about this problem that you're having. It sounds like any number of issues in the handshake between the FPGA and the uPP peripheral could be causing your issue. They mentioned D... - Hello,
I am writing a linux uPP driver for bi-directional comms between the fpga and OMAP. From what I can tell the FPGA is receiving data from the OMAP correctly, but THe OMAP is not getting the return data from the FPGA. In our cur... - JP 05:22 PM ARM9 Based QNX Platforms Software Development: RE: ClockPeriod
- The QT_TIMER_LOAD value of 0x30 is just an offset into the system page or some structure. It is not the actual load value.
- JP 05:20 PM ARM9 Based QNX Platforms Software Development: RE: ClockPeriod
- Rob,
It looks like there is a callout function that does not really do what it is supposed to. I suspect the kernel is expecting the timer to change but nothing is happening at the lower level. The timer_load values you show seem cons... - RG 01:32 PM ARM9 Based QNX Platforms Software Development: RE: ClockPeriod
- Hi John,
The pidin program does not display the info we're interested in, so I modified my clock_period program to display the timer_load value (not to be confused with the timer_load callout) from the syspage. Here are the results:
... - RB 03:11 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Using dspQDMA library on OMAP-L138
- Great! Thanks very much guys. This should get me on the right track.
- DR 12:41 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Using dspQDMA library on OMAP-L138
- Mike and I apparently were typing simultaneously! Good thing we both came up with the same answer!
Dave
- DR 12:40 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Using dspQDMA library on OMAP-L138
- Typically, we kick off the DMA from an ISR and pend for it in a task. Pending from within an ISR is not allowed. You could kick off the DMA from with the timer function, and pend for the semaphore within a monitoring task. This will av...
- MW 12:35 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Using dspQDMA library on OMAP-L138
- If you are calling SEM_pend() from within an ISR, you need to use a zero timeout. You could do a
- RB 12:16 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Using dspQDMA library on OMAP-L138
- If I did want to be sure that the operation had completed before moving on, is there an alternative approach. In this case polling would probably be ok, but I didn't see any methods in the class to support polling.
-rb - RB 12:15 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Using dspQDMA library on OMAP-L138
- Hi Mike,
I will check on the initialization value. I was calling the SEM_pend function immediately after requesting the DMA operation initially so that I wouldn't leave the routine before the transfer had completed. The last question wa... - JP 10:06 AM ARM9 Based QNX Platforms Software Development: RE: Pin MUX
- You will probably need to modify the omapl138_psc_init() to include a line like:
omapl138_psc_enable (PSC_MODULE_UART2);
Hope this helps.
- We are trying to use the MityDSP L138 UART2 on the PROFIBUS dev kit with Qnx. We are connecting via J504.
I saw mention of removing jumper JP500-502 and installing JP503, but those do not appear to be on our board.
We've updated the c...
10/19/2011
- MW 12:38 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Using dspQDMA library on OMAP-L138
- Hi Richard,
How are you creating the Semaphore? Zero initialization value?
Is it possible your routine that is pending is running slower than the 5 ms PRD timer (and you are effectively falling behind)? Are your timer routines ru... - I am using the dspQDMA class in a project on the mity-omap processor. I was able to successfully load all of the components and successfully link my project for the dsp. When I execute the dspQDMA->ReadFromFIFO routine (I am reading data...
10/18/2011
- JP 02:48 PM ARM9 Based QNX Platforms Software Development: RE: ClockPeriod
- Rob,
With regards to the syspage, I was hoping to see values change after changing the ClockPeriod. Sections relating to time and clocks seemed like good candidates. If the x86 shows changes in one way and the omap shows changes in a ... - RG 02:37 PM ARM9 Based QNX Platforms Software Development: RE: ClockPeriod
- John,
I just tried the above mentioned change, and as you suspected it did not fix the problem but was worth a try.
Regarding the pidin info, could you let me know what section of the syspage you would like to see. I did capture th... - RG 02:38 PM ARM9 Based QNX Platforms Software Development: RE: QNX BSP Timers
- John,
We have tried using ClockCycles(). I think it may be working for us but will check with the other developers to make sure.
Thanks,
Rob
10/17/2011
- JP 10:06 AM ARM9 Based QNX Platforms Software Development: RE: QNX BSP Timers
- Rob,
Have you tried using ClockCycles()?
John - JP 10:02 AM ARM9 Based QNX Platforms Software Development: RE: ClockPeriod
- Rob,
I see your point.
We have not provided the arm clock handling routines so in that sense, this would seem to be the arm-specific part of QNX. My understanding though, is that the kernel gets things like device specific handling...
10/13/2011
- RG 12:33 PM ARM9 Based QNX Platforms Software Development: RE: ClockPeriod
- John,
Actually, the point I was trying to make is that changing the system tick using ClockPeriod confuses the OS concept of time, which shouldn't happen. Using the attached program this is what happens:
# ./clock_period
ClockPer... - JP 09:16 AM ARM9 Based QNX Platforms Software Development: RE: ClockPeriod
- Rob,
I don't have experience trying to change the clock period. The documentation does seem to indicate that making the period very small can result in significant overhead in the system from all the interrupts. (see clock_setres() a... - JP 08:54 AM ARM9 Based QNX Platforms Software Development: RE: QNX BSP Timers
- Rob,
I don't know of a feature like this. I have always just used the CLOCK_REALTIME.
John
10/12/2011
- MW 04:01 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: HelloWorldDSP.out syntax error
- Hi Peter,
Thank you for your feedback. We'll try to update the Hello World page and address your comments. The challenge of course is that many tools (e.g., CCS from TI and eclipse in general) continue to migrate and change and we m... - PS 03:19 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: Reflections after building DSP "Hello, world!"
- I managed to compile the DSP Hello World...*finally*.
(Using Version: 4.2.4.00033 of CCS on WinXP)
I noticed a few of issues when following the guide at:
http://support.criticallink.com/redmine/projects/arm9-platforms/wiki/DSP_Hel... - Hello,
We are trying to debug a uPP application and routed the chan A and Chan B signals through the fpga to connector J104. The Industrial IO data sheet lists 10 of these pins as LVDS pairs and mentions added termination resistors f...
10/11/2011
- Hello,
I am having problems changing the system clock period using the QNX BSP. When I try to change it using the ClockPeriod function, it sets a value that confuses QNX as to the correct time. For example, if I try to change the pe... - Hello,
I have a need for a timer that supports a higher resolution than QNX CLOCK_REALTIME. It will be used for high accuracy timestamps, but probably will not need to drive an interrupt.
Is a feature like this already supported i...
10/10/2011
- MC 03:36 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: HelloWorldDSP.out syntax error
- those binaries were a great sanity check for me. you guys might consider posting them to the quick start page.
Mike
10/06/2011
- Hi,
After transferring the jffs2 filesystem via uBoot, using the "nand write.jffs2 C2000000 0 <>" command, is there any method to check whether the file system is fine - before starting kernel - in order to detect block errors or possi...
10/03/2011
- SW 03:48 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uPP digital loopback
- Greg,
I'm using the default ASYNCH3 clock which is PLL_SYSCLK1 I think. This should be divided down automatically. Since I am just using this to test the uPP I won't worry about it and keep the Chan A and Chan B clock divisors equal... - GG 01:49 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uPP digital loopback
- Hi Scott,
As far as I know we have not seen any issue like what you're describing when using a uPP clock driven by the FPGA. Given, we haven't done much work with the uPP in DLB, so it could be a problem unique to that setup.
Anoth... - Hello,
I have a linux driver module to test the uPP in digital loopback. I saw some odd behavior in regards to the clock divisors on Channels A and B. I have the module set to loopback 64 bytes from channel A to channel B. If I se...