Activity
From 11/21/2012 to 12/20/2012
12/20/2012
- 09:49 PM FPGA Development: RE: Pinout on L138-FG-225-RC
- Michele,
In response to your GPIO bank question:
Yes you can use a single core in the FPGA and have it utilize ... - 09:44 PM PCB Development: RE: SATA board connector
- Scott,
Just wondering if you found a drop in replacement. We actually just tried doing this on an in-house test fi... - 09:39 PM Software Development: RE: tftp access violation
- Wade,
I'm going to take a stab in the dark here on a suggestion to give you something to try. If you think you may... - 09:26 PM Software Development: RE: The Jtag Interface
- If you can wait approximately a week or two Digikey should have them in stock for ordering (http://www.digikey.com/pr...
- 08:33 PM Software Development: RE: The Jtag Interface
- hi mike
I buy a 1808-FX-225-RC. it is without the adapter board. How can I get one?
thanks - 09:49 AM Software Development: RE: New UBoot Image That Fixes Bootelf Hang When Running Starterware
- Sorry for the delay.
The code to support the updated features was checked into our "git server":http://support.cri... - 09:34 AM Software Development: RE: New UBoot Image That Fixes Bootelf Hang When Running Starterware
- Was there an official release?
What / where is the latest/greatest? - 09:41 AM Software Development: RE: PROC_read()
- Or.... you can use PROC_read, but you need to build your own synchronization hooks. This is what Greg was alluding t...
- 09:40 AM Software Development: RE: PROC_read()
- The PROC_read() API is not guarded. It's effectively a memory copy (dealing with the VM addressing under linux).
... - 09:21 AM Software Development: RE: PROC_read()
- Greg,
Can you clarify your answer with a bit more detail? Are you saying that the DSP should send a message to the...
12/19/2012
- 02:54 PM Software Development: RE: PROC_read()
- Hi Terrence,
What I've seen done here in situations like you are describing is to use the dsplink interfaces and ... - 02:45 PM Software Development: RE: PROC_read()
- To clarify. I am using Critical Link's API MityDSP::tcDspApp to load the DSP application, configure the shared memor...
- I have a shared memory read issue between the ARM and DSP processor that I am trying to resolve. I am using PROC_rea...
12/18/2012
- 09:38 AM FPGA Development: RE: I2C issues on SLX45
- Further - I broke my OLED writes into < 32 bytes each and retested. That works fine and if it was unreliable, the pic...
- 08:54 AM FPGA Development: RE: I2C issues on SLX45
- Hi guys. Got a chance to test this today. That's a lot better! The i2cdetect scan picks up the device and shows "--" ...
- 09:00 AM FPGA Development: RE: Xilinx design suite 14.2 and MDK_2012-08-10
- The EMIFA DCM may not be required. If you do not require any other clocks than the 100 MHz (when running at 300 MHz ...
- 08:32 AM FPGA Development: RE: Xilinx design suite 14.2 and MDK_2012-08-10
- Hmmm. Not sure now because I'm afraid I didn't use the DCM at all! I didn't connect the i_ema_clk directly but via a ...
- 08:13 AM FPGA Development: RE: Xilinx design suite 14.2 and MDK_2012-08-10
- Dear Conor,
I appreciate your help!
I have the suspect that the component emaclkdcm-Emifa_dcm is a digital cloc... - 05:43 AM FPGA Development: RE: Xilinx design suite 14.2 and MDK_2012-08-10
- The learning curve for Xilinx tools is pretty darn steep anyway without jumping in at the deep end!
What *I* did i...
12/17/2012
- Hello,
I'm working to a project with a MityOMAP-L138-FX-225-RC.
Currently, I try to use SYSBIOS into this module... - 01:44 PM FPGA Development: RE: Xilinx design suite 14.2 and MDK_2012-08-10
- Dear Jean-Pierre,
I am a newbie too in fpga programming: could you please post me a suggestion about the solution?
... - 10:20 AM FPGA Development: RE: I2C issues on SLX45
- Scratch that - I see -DDEBUG is in the Makefile :)
- 10:17 AM FPGA Development: RE: I2C issues on SLX45
- No worries Mike. I used to be a QA guy so I must have a knack for finding these things! Like communicating with a non...
- 09:17 AM FPGA Development: RE: I2C issues on SLX45
- Hi Conor,
I am updateing (via editing) the patch on the previous post. We've finished some testing here and found...
12/16/2012
- 09:04 AM FPGA Development: RE: I2C issues on SLX45
- Thanks Mike, I looked at the driver code but wasn't really familiar enough with it to help. I was suspicious somethin...
12/14/2012
- 01:46 PM FPGA Development: RE: I2C issues on SLX45
- Hi Connor.
I think we may have found the issue. There may be a bug in the linux driver.
If you are OK recompil...
12/11/2012
- 08:40 AM Software Development: RE: dsplinkk.ko compatibility
- I updated my instructions to clarify the commands on the last post...
-Mike
- 08:34 AM Software Development: RE: dsplinkk.ko compatibility
- If you added or removed features from the kernel, you may need to rebuild the dsplink drivers.
To do that:
# s... - 08:09 AM Software Development: RE: dsplinkk.ko compatibility
- Michael Williamson wrote:
> There should be a dsplinkk.ko file in the /lib/modules/3.2.0/ directory in the reference...
12/06/2012
- 01:51 PM Software Development: RE: Linux DaVinci Video Port Interface (VPIF)
- My OMAP-L138 VPIF issue has been resolved! There was a conflict with PINMUX16 and PINMUX17 control register settings...
- 12:25 PM Software Development: RE: Extremely slow root file system
- Thanks Mike for answer.
I forwarded your last comment to our HW engineer.
Chances are I will not get other que... - 09:23 AM Software Development: RE: Extremely slow root file system
- The approach by your HW designer is fine.
Tri-stating the unused lines that are connected to the EMIFA and IRQ l... - 09:13 AM Software Development: RE: Extremely slow root file system
- Mike,
The unused I/O pins in our FPGA design seems to be the culprit.
Here a comment from our hardware engineer...
12/05/2012
- 03:22 PM Software Development: RE: Extremely slow root file system
- Please make sure that any unused IO pins on your FPGA design are "floating" and not "pulled-down" in the bitstream ge...
- Hardware configuration: Industrial IO board + L138-DI-225-RI
We have a FPGA application that transmit data to DSP ... - 10:49 AM FPGA Development: RE: I2C issues on SLX45
- I dropped the drive strength to 6 on the SCL and SDA lines and it makes a slight difference - not so much ground boun...
- 07:20 AM FPGA Development: RE: I2C issues on SLX45
- (Busy writing reports instead of doing the work the reports are about!)
For drive strength I was using the Xilinx ...
12/04/2012
- 11:29 AM Software Development: RE: Linux DaVinci Video Port Interface (VPIF)
- Hi Terrence,
Sorry for the confusion. The linux kernels 2.6.X tracked TI's Platform Support Package releases from... - 09:55 AM Software Development: RE: Linux DaVinci Video Port Interface (VPIF)
- I am currently using MDK_2011-12-05 DaVinici Linux kernel to support VPIF on a OMAP-L138F SoM platform. I attempted ...
- I need to setup a VPIF interface (ala V4L2) using a Mity OMAP-L138F SoM platform running DaVinci Linux to support, BT...
- 07:12 AM FPGA Development: RE: I2C issues on SLX45
- Hi Conor,
What are you using for drive strength on the FPGA? You might be able to lower the drive strength if the... - 05:50 AM FPGA Development: RE: I2C issues on SLX45
- Hi again. It looks like the fpga is doing the right thing but the rise times are just too slow. Er. I guess that's my...
12/03/2012
- 10:26 AM FPGA Development: RE: I2C issues on SLX45
- Oh and 5K pull ups are to 3.3V on pin J701.38. SDA/SCL read 3.3V, at least on power on they do...
- 10:14 AM FPGA Development: RE: I2C issues on SLX45
- Thanks Mike. Sure it was evident the generics shouldn't be there and if they are it won't synthesise so it's not much...
- 07:14 AM FPGA Development: RE: I2C issues on SLX45
- Hello Conor,
For the I2C, you are correct, the generics in the TOP were a carry over from a previous port -- shoul... - Just one or two questions on the I2C ngc module. The industrialio_top.vhd example code uses a generic map to set cloc...
- 08:31 AM Software Development: RE: Using RAM as temporary storage
- The 128 MB of Memory is total system memory. Some of it is used for the kernel and application space, but typically ...
- 04:23 AM FPGA Development: RE: Pinout on L138-FG-225-RC
- Thank you Mike!
Another question: I see that you provide Bank 0 and Bank 1 of the FPGA on the SO-DIMM socket.
Am ...
12/02/2012
- 02:59 PM FPGA Development: RE: Pinout on L138-FG-225-RC
- Hi Michele,
There is no issue if you are using 6SLX16 FPGAs in any module configuration.
This only a problem wi... - 02:53 PM FPGA Development: RE: Pinout on L138-FG-225-RC
- Hello Tom,
the issue is (or was) on the datasheet of the SOM MityDSP
http://www.mitydsp.com/images/upload/File/... - 02:24 PM FPGA Development: RE: Pinout on L138-FG-225-RC
- Michele -
Can I ask for a reminder of what that issue is or a pointer to a forum post? I'm unable to locate it at... - Hello All,
to be sure about the pinout of the SOM L138-FG-225-RC using the FPGA 6SLX16 , I ask if you fixed the issu...
11/30/2012
- Posting on behalf of a customer:
Customer wants to store data to the SD card but believes they will be bursting mo...
11/29/2012
- 05:34 PM FPGA Development: RE: Xilinx design suite 14.2 and MDK_2012-08-10
- I found the solution!:)
- We've been using an OMAP-L138F SOM that has exhibited no problems until we re-flashed the section containing FPGA bin...
- 11:16 AM Software Development: RE: Cannot Toggle GPIO pin
- Thanks for your speedy reply. I'm using 3.2 from the 2012-08-10 MDK.
- 11:14 AM Software Development: RE: Cannot Toggle GPIO pin
- Hi Spencer,
The issue is that the MCASP (see baseboard-industrialio.c) setup is configuring that pin to be in AFSR... - 11:04 AM Software Development: RE: Cannot Toggle GPIO pin
- Some funky formatting happened with the gpio name. Just for clarification its GPIO 0_13.
- I'm running a MitydspL138 on the Industrial IO board, and I'm trying to set GPIO[0]_13 via echoing directions and val...
- 09:39 AM Software Development: RE: Problems building a rootfile system
- Mike,
You are right - it was a config problem. By comparing the config you attached with the default "industial io...
11/28/2012
- 01:51 PM Software Development: RE: Problems building a rootfile system
- Thanks for the information.
We have at least one active customer using the 3.2 kernel on an Industrial-IO board wi... - 05:30 AM Software Development: RE: Problems building a rootfile system
- Hi,
Mike, thanks for your clarification.
I have two sata disks, one SSD which is sata-II (3.0gb) and one old m...
11/27/2012
- Hi all,
I am beginner with FPGA programming and want to develop a simple project on my MityDSP-l138F, involving only... - 10:39 AM Software Development: RE: Problems building a rootfile system
- Hello,
I'm fairly certain that TI submitted the ahci-ti.c stuff originally in their PSP into the mainline and it g... - 09:38 AM Software Development: RE: Problems building a rootfile system
- Hi,
Just compared the drivers/ata for kernel version 2.6.34 and 3.2. It seems obvious that the 3.2 branch is lacki...
11/26/2012
- 05:17 PM Software Development: RE: helloworld dsplink example
- Do not get a chance to exit the application.
here is the log:
root@mityomapl138:/#
root@mityomapl138:/#
roo... - 02:49 PM Software Development: Building openembedded-core from scratch : MityDSP overlay breaks meta-toolchain-qte
- Hi,
Is there a fix yet for the broken build system?
Would it not be possible to move the open parts to a publi...
11/25/2012
- 02:34 PM Software Development: RE: GPIO Interrupt: request_irq() returning error: EINVAL
- Hi Mike,
You were correct - I had failed to use the gpio_to_irq() function.
It all works sweet now!
Thanks for you...
11/24/2012
- 07:59 PM Software Development: RE: helloworld dsplink example
- Are you exiting the application by hitting 'q'?
-Mike
- in Helloworld dsp link example, get follwing aserts! why?
root@mityomapl138:/# ./HellWorldARM HellWorldDSP.out
Lo... - 03:46 PM Software Development: RE: dsplinkk.ko compatibility
- There should be a dsplinkk.ko file in the /lib/modules/3.2.0/ directory in the reference filesystems. See http://sup...
11/23/2012
- The MityDSP board has installed Linux kernel v 3.2.0. This was required for compatibilty with g_ether.ko driver for e...
11/22/2012
- 09:02 AM Software Development: RE: Problems building a rootfile system
- Hello,
We've actually seen this issue on both kernels, and in general have traced the issue back to an Errata on t... - 03:35 AM Software Development: RE: Problems building a rootfile system
- Hello,
I have decided to use the Yocto framework for building my rootfs. Together with the 3.2 kernel compiled fro... - 08:43 AM Software Development: RE: GPIO Interrupt: request_irq() returning error: EINVAL
- I am assuming you are writing kernel code or a kernel module?
Can you send a snippet of the code?
The GPIO inte...
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