ARM/R5 JTAG Debugging¶

Requires: Code Composer (CCS) v7+

Instructions tested on CCS v12.8 with XDS200 emulator

These instructions assume the board is booted via u-boot and as such ARM clocks and DDR settings are already setup.

• Connect debugger to computer and board
• Open Code Composer (CCS)
• File -> New -> Target Configuration File
  • File name: {SOM_NAME}_XDS200.ccxml
  • Check "Use shared location"
  • Click Finish
• Edit opened Target Configuration
  • Connection: Select the correct debug probe.
    "Texas Instruments XDS2xx USB Debug Probe" for the XDS200
  • Board or Device: AM62A/P
  • Select Save
  • Select Test Connection
    attachment:xds200_debug_test_connection.log
• View -> Target Configurations
  • In the Target Configuration view, expand the "User Defined folder"
  • Right click on the new Target Configuration File and select the "Launch Selected Configuration"
  • If a firmware update warning window opens, select Update
    If you get an error during update, try updating manually: https://software-dl.ti.com/ccs/esd/documents/xdsdebugprobes/emu_xds200.html#updating-the-firmware
• Open Target Status view, this shows each of the slave cores Power, Clocks, and reset status
  • View -> Other, Select Debug/Target Status and Open
• Connect to A53SS0_CORE1_0
  • Right click on A53SS0_CORE1_0 and select "Connect to target"
  • Make sure to resume the core before too long or Linux will get a bit angry, Run -> Resume
• Load GEL FILE
  • Ensure A53SS0_CORE1_0 is selected
  • Navigate to toolbar>Tools>GEL Files
  • In the GEL Files view (usually in bottom right), Select the GEL files category
  • Right click in the empty space under "Script | Status", and select "Load GEL..."
  • Open the following gel file: C:\ti\ccs1120\ccs\ccs_base\emulation\gel\{AM62A/P}\{AM62A/P}.gel
  • With the A53SS0_CORE1_0 suspended, select Scripts and explore the different options
• View physical memory addresses
  • With any core suspended, View -> Memory Browser