JTAG Debug Interface

The JTAG (J9) interface is located on the baseboard and uses a "TI 20-pin connector". This is the standard connector on the XDS200/XDS110.

Support JTAG emulators

ARM: TI XDS200 $295, TI XDS110 $99, Blackhawk XDS560 v2 $995

ARM/M4 debugging

Requires: Code Composer (CCS) v7+

Instructions tested on CCS v11.2 with XDS200 emulator

These instructions assume the board is booted via u-boot and as such ARM clocks and DDR settings are already setup.

  • Connect debugger to computer and board
  • Open Code Composer (CCS)
  • File -> New -> Target Configuration File
    • File name: AM62_XDS200.ccxml
    • Check "Use shared location"
    • Click Finish
  • Edit opened Target Configuration
    • Connection: Select the correct debug probe.
      "Texas Instruments XDS2xx USB Debug Probe" for the XDS200
    • Board or Device: AM62
    • Select Save
    • Select Test Connection
  • View -> Target Configurations
  • Open Target Status view, this shows each of the slave cores Power, Clocks, and reset status
    • View -> Other, Select Debug/Target Status and Open
  • Connect to CortexA53_1
    • Right click on CortexA53_1 and select "Connect to target"
    • Make sure to resume the core before too long or Linux will get a bit angry, Run -> Resume
  • Load GEL FILE
    • Ensure CortexA53_1 is selected
    • In the GEL Files view (usually in bottom right), Select the GEL files category
    • Right click in the empty space under "Script | Status", and select "Load GEL..."
    • Open the following gel file: C:\ti\ccs1120\ccs\ccs_base\emulation\gel\AM62x\AM62x.gel
    • With the CortexA53_1 suspended, select Scripts and explore the different options
  • View physical memory addresses
    • With any core suspended, View -> Memory Browser

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